表側と裏側の絶縁膜界面にトラップ準位をもつポリシリコン薄膜トランジスタのデバイスシミュレーション(<小特集>ディスプレイ-IDW'03関連-)

概要

論文の詳細を見る
Device simulation of polycrystalline-silicon thin-film transistors (TFTs) was carried out with trap states at front and back oxide interfaces. First, the trap densities at the front oxide interface (Dfr) and at the back oxide interface (Dbk) were extracted from actual transistor characteristics. Next, the dependence of transistor characteristics on the Dfr and Dbk was then analyzed Using a 2-D device simulator by varying the Dfr and Dbk from the standard Dfr and Dbk. It was found that both the Dfr and Dbk influenced the subthreshold swing and threshold voltage. However, neither the Dfr nor Dbk had much influence on transistor mobility. It was necessary to simultaneously reduce both the Dfr and Dbk to product excellent poly-Si TFTs.
社団法人映像情報メディア学会の論文
2004-09-01