Shimoda Tatsuya[ | Base Technology Research Center Seiko Epson Corporation
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概要
関連著者
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木村 睦
龍谷大学電子情報学科
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井上 聡
セイコーエプソン株式会社フロンティアデバイス研究所
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下田 達也
Center For Nano Materials And Technology Japan Advanced Institute Of Science And Technology
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SHIMODA Tatsuya
Seiko Epson Corporation
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Shimoda Tatsuya[
Base Technology Research Center Seiko Epson Corporation
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下田 達也
Seiko Epson Corporation
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木村 睦
Department Of Electronics And Informatics Ryukoku University
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Kimura Mutsumi
Ryukoku University:innovative Materials And Processing Research Center
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Inoue S
Seiko Epson Corporation
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KIMURA Mutsumi
Ryukoku University
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Kimura M
Department Of Electrical Engineering Kure National College Of Technology
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Kimura Mutsumi
Ryukoku Univ. Otsu‐shi Jpn
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INOUE Satoshi
Base Technology Research Center, Seiko Epson Corp.
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SHIMODA Tatsuya
Base Technology Research Center, Seiko Epson Corp.
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KIMURA Mutsumi
Base Technology Research Center, Seiko Epson Corporation
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Shimoda Tatsuya
Base Technology Research Center Seiko Epson Corporation
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Kimura Mutsumi
Base Technology Research Center Seiko Epson Corporation
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井上 聡
セイコーエプソン(株)フロンティアデバイス研究所
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下田 達也
セイコーエプソン 基盤技術研究所
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下田 達也
セイコーエフ゜ソン株式会社 Tprc 第四研究ク゛ルーフ゜
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木村 睦
龍谷大学 理工学部 電子情報学科
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木村 睦
セイコーエプソン(株)基盤技術研究所
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野澤 陵一
セイコーエプソン株式会社OLED技術開発部
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木村 睦
セイコーエプソン 基盤技研
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Nozawa Ryoichi
Base Technology Research Center Seiko Epson Corporation
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INOUE Satoshi
Seiko Epson Corporation
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Shimoda Tatsuya
Seiko Epson Corp. Nagano Jpn
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Inoue S
Frontier Device Research Center Seiko Epson Corporation
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Izumi S
Division Of Oral Cytology And Cell Biology Nagasaki University Graduate School Of Biomedical Science
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INOUE Satoshi
Technology Platform Research Center, Seiko Epson Cooperation
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SHIMODA Tatsuya
Technology Platform Research Center, Seiko Epson Cooperation
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TAM Simon
Cambridge Research Laboratory of Epson
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Lui BaSil
エプソンケンブリッジ研究所
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Migliorato Piero
ケンブリッジ大学工学部
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Tam S
Cambridge Research Laboratory Of Epson
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Lui B
Epson Cambridge Lab. Cambridge Gbr
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NOZAWA Ryoichi
Base Technology Research Center, Seiko Epson Corporation
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Migliorato Piero
Univ. Cambridge Cambridge Gbr
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Shimoda Tatsuya
Technology Platform Research Center Seiko Epson Corp.
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宮下 悟
セイコーエプソン 基盤技術研究所
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HARADA Kiyoshi
Department of Electronics and Informatics, Ryukoku University
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YASUHARA Tohru
Department of Electronics and Informatics, Ryukoku University
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KIMURA Mutsumi
Department of Electronics and Informatics, Ryukoku University
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HARA Yuji
Ryukoku University
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HARA Hiroyuki
Seiko Epson Corporation
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OKUYAMA Tomoyuki
Seiko Epson Corporation
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ABE Daisuke
Technology Platform Research Center, Seiko Epson Cooperation
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KIMURA Mutsumi
Technology Platform Research Center, Seiko Epson Corporation
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Tam Simon
エプソンケンブリッジ研究所
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Abe Daisuke
Frontier Device Research Center Seiko Epson Corporation
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LUI Basil
Epson Cambrodge Laboratory
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TAM Simon
Epson Cambridge Laboratory
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MIGLIORATO Piero
Department of Engineering, University of Cambridge
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SAMESHIMA Toshiyuki
Division of Electric and Information Engineering, Tokyo University of Agriculture and Technology
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Yasuhara Tohru
Department Of Electronics And Informatics Ryukoku University
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Migliorato Piero
Department Of Engineering University Of Cambridge
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前田 浩
セイコーエプソン(株)基盤技術研究所
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松枝 洋二郎
セイコーエプソン(株)基盤技術研究所
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宮下 悟
セイコーエプソン(株)nxd開発部
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宮下 悟
セイコーエプソン
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SAMESHIMA Toshiyuki
Department of Electrical and Electric Engineering, Tokyo University of Agriculture and Technology
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Hara Hiroyuki
Seiko Epson Corp. Nagano Jpn
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Kimura Mutsumi
Ryukoku Univ. Otsu Jpn
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Kimura Mutsumi
Technology Platform Research Center Seiko Epson Corporation
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Harada Kiyoshi
Department Of Electronics And Informatics Ryukoku University
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EGUCHI Tsukasa
LT Business Development Center, Seiko Epson Corporation
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Eguchi Tsukasa
Lt Business Development Center Seiko Epson Corporation
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Okuyama Tomoyuki
Seiko Epson Corp. Nagano Jpn
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松枝 洋二郎
セイコーエプソン
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Kimura Mutsumi
Department of Chemistry, Graduate School of Natural Science and Technology, Okayama University
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Lui Basil
Epson Cambridge Laboratory, 8c King's Parade, Cambridge CB2 1SJ, United Kingdom
著作論文
- Classification of Driving Methods for TFT-OLEDs and Novel Proposal Using Time Ratio Grayscale and Current Uniformization(Electronic Displays)
- 表側と裏側の絶縁膜界面にトラップ準位をもつポリシリコン薄膜トランジスタのデバイスシミュレーション(ディスプレイ-IDW'03関連-)
- Poly-Si TFT特性の酸化膜界面トラップと結晶粒界トラップに対する依存性およびその製造プロセス診断への応用(半導体Si及び関連材料・評価)
- Numerical Model of Thin-Film Transistors for Circuit Simulation Using Spline Interpolation with Transformation by y=x + log(x)(Regular Section)
- 多結晶シリコン薄膜トランジスタの絶縁膜-シリコン界面と結晶粒界のトラップ準位の抽出(低温または高温多結晶Siとアクティブマトリックス型ディスプレイ用薄膜トランジスタ論文特集)
- 多結晶シリコン薄膜トランジスタの特性解析とシミュレーション
- 多結晶シリコン薄膜トランジスタの特性解析とシミュレーション
- 低温多結晶シリコン薄膜トランジスタ駆動発光ポリマーディスプレイ
- Extraction of Trap States at the Oxide-Silicon Interface and Grain Boundary for Polycrystalline Silicon Thin-Film Transistors : Semiconductors
- Current Density Enhancement at Active Layer Edges in Polycrystalline Silicon Thin-Film Transistors : Semiconductors
- Device Simulation of Carrier Transport through Grain Boundaries in Lightly Doped Polysilicon Films and Dependence on Dopant Density : Semiconductors
- Current Paths over Grain Boundaries in Polycrystalline Silicon Films : Semiconductors
- Device Simulation of grain Boundaries with Oxide-Silicon Interface Roughness in Laser-Crystallized Polycrystalline Silicon Thin-Film Transistors
- 24.4:Investigation of Hot Carrier Degradation Due to AC Stress in Low Temperature Poly-Si TFTs(発表概要)(Report on 2000 SID International Symposium)