Numerically Controlled Dry Etching Technology for Flattening of Si Wafer which Employs SF_6/H_2 Downstream Plasma
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概要
- 論文の詳細を見る
Technology for the damage-free flattening of a Si wafer that employs a numerically controlled local dry etching (NC-LDE) technology has been developed to meet the requirement for achieving an extremely flat-surface wafer for the downscaling of ULSI feature size. In this technology, fluorine atoms which are generated in a localized SF_6/H_2 downstream plasma are exposed at a local area of a Si wafer, thereby generating a high etch rate of 130 μm/min at the bottom of the etched profile and a volume removal rate of 45.9mm^3/min. The flattening process was carried out by numerically controlled scan etching according to previously measured thickness data and consequently site flatness was improved from 0.51 μm to 0.08 μm within 150 s for a 200-mm-diameter Si wafer. This level of flatness will be the value required after 2005. Damage-free characteristics were also confirmed by minority carrier recombination lifetime and sub-surface defect measurements.
- 社団法人応用物理学会の論文
- 2002-05-15
著者
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HORIIKE Yasuhiro
Department of Electrical Engineering, Toyo University
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Iida S
Toyama Univ. Toyama Jpn
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Iida Shinya
Speedfam Co. Ltd.
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Horiike Yasuhiro
Department Of Electrical & Electronics Engineering Tokyo University
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YANAGISAWA Michihiko
Department of Material Science, School of Engineering, University of Tokyo
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Yanagisawa Michihiko
Department Of Material Science School Of Engineering University Of Tokyo
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HORIIKE Yasuhiro
Department of Material Science, School of Engineering, University of Tokyo
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