Improved Conductance Method for Determining Interface Trap Density of Metal–Oxide–Semiconductor Device with High Series Resistance
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概要
- 論文の詳細を見る
The existence of series resistance in metal–oxide–semiconductor (MOS) devices can result in both the degradation of capacitance at a high frequency and the decrease in conductance. Using a conventional conductance method that does not consider the series resistance, the interface trap density can be underestimated. We propose an improved conductance method based on an equivalent circuit model including the series resistance. Compared with the conventional method, this new method enables the accurate determination of interface trap density.
- INSTITUTE OF PURE AND APPLIED PHYSICSの論文
- 2005-11-10
著者
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Hwang Hyunsang
Department Of Materials Science And Engineering Gwangju Institute Of Science And Technology
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Yang Hyundoek
Department Of Materials Science And Engineering Gwangju Institute Of Science And Technology
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Son Yunik
Department Of Materials Science And Engineering Gwangju Institute Of Science And Technology
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Choi Sangmoo
Department Of Materials Science And Engineering Gwangju Institute Of Science And Technology
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Son Yunik
Department of Materials Science and Engineering, Gwangju Institute of Science and Technology, #1 Oryong-dong, Buk-gu, Gwangju 500-712, Korea
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