Gate Workfunction Engineering of Bulk FinFETs for Sub-50nm DRAM Cell Transistors
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概要
- 論文の詳細を見る
- 2006-09-13
著者
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Kim Young
School Of Life Science And Biotechnology Kyungpook National University
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Lee Jong-ho
School Of Electrical Engineering Wonkwang University
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PARK Ki-Heung
School of Electrical Engineering and Computer Science, Kyungpook National Univ.
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Lee Jong-ho
School Of Electrical Engineering And Computer Science Kyungpook National Univ.
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Park Ki-heung
School Of Eecs Kyungpook National University
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Park Ki-heung
School Of Electrical Engineering And Computer Science Kyungpook National Univ.
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Kim Young
School Of Advanced Materials Science And Engineering Sungkyunkwan Univ.
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Kim Young
School Of Electrical Engineering And Computer Science Kyungpook National Univ.
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Han Kyoung
School Of Eecs Kyungpook National University
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Lee Jong-ho
School Of Eecs Engineering Kyungpook National University
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Lee Jong-Ho
School of EECS and ISRC, Seoul National University, Seoul 151-742, Korea
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