PARK Ki-Heung | School of Electrical Engineering and Computer Science, Kyungpook National Univ.
スポンサーリンク
概要
- PARK Ki-Heungの詳細を見る
- 同名の論文著者
- School of Electrical Engineering and Computer Science, Kyungpook National Univ.の論文著者
関連著者
-
Lee Jong-ho
School Of Electrical Engineering Wonkwang University
-
PARK Ki-Heung
School of Electrical Engineering and Computer Science, Kyungpook National Univ.
-
Park Ki-heung
School Of Eecs Kyungpook National University
-
Lee Jong-ho
School Of Eecs Engineering Kyungpook National University
-
Lee Jong-Ho
School of EECS and ISRC, Seoul National University, Seoul 151-742, Korea
-
Kim Young
School Of Life Science And Biotechnology Kyungpook National University
-
Lee Jong-ho
School Of Electronic Engineering Daegu University Jillyang
-
Jung Han-a-reum
School Of Eecs Kyungpook National University
-
Lee Jong-ho
School Of Electrical Engineering And Computer Science Kyungpook National Univ.
-
Park Ki-heung
School Of Electrical Engineering And Computer Science Kyungpook National Univ.
-
Kwon Hyuck-in
School Of Eecs Kyungpook National University
-
Kim Young
School Of Advanced Materials Science And Engineering Sungkyunkwan Univ.
-
Kim Young
School Of Electrical Engineering And Computer Science Kyungpook National Univ.
-
Han Kyoung
School Of Eecs Kyungpook National University
-
Lee J‐h
School Of Electrical Engineering And Computer Science Kyungpook National Univ.
-
Choi Byung-kil
School Of Electrical Engineering And Computer Science Kyungpook National Univ.
-
HAN Kyoung-Rok
School of Electrical Engineering and Computer Science, Kyungpook National Univ.
-
JUNG Sang-Goo
School of Electrical Engineering and Computer Science, Kyungpook National Univ.
-
Lee Jong-ho
Samsung Electronics Company Ltd.
-
Jung Sang-goo
School Of Electrical Engineering And Computer Science Kyungpook National Univ.
-
Han Kyoung-rok
School Of Electrical Engineering And Computer Science Kyungpook National Univ.
-
Lee Jong-ho
School Of Eecs Kyungpook National University
著作論文
- 2-bit/cell Characteristics of High-Density and High-Performance SONOS Flash Memory Cell with Recessed Channel Structure
- Characteristics of Locally-Separated Channel FinFETs with Non-Overlapped Source/Drain to Gate for Sub-50nm DRAM Cell Transistors(Session2: Silicon Devices I)
- Characteristics of Locally-Separated Channel FinFETs with Non-Overlapped Source/Drain to Gate for Sub-50nm DRAM Cell Transistors(Session2: Silicon Devices I)
- Modified Saddle MOSFETs for Sub-50nm DRAM Technology(Session 1 Silicon Devices I,AWAD2006)
- Gate Workfunction Engineering of Bulk FinFETs for Sub-50nm DRAM Cell Transistors