Choi Byung-kil | School Of Electrical Engineering And Computer Science Kyungpook National Univ.

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著作論文

2-bit/cell Characteristics of High-Density and High-Performance SONOS Flash Memory Cell with Recessed Channel Structure
Device Design Consideration for 50nm Dynamic Random Access Memory Using Bulk FinFET
Analytic oxide capacitance model of double- and surrounding-gate metal-oxide-semiconductor field-effect transistors in linear region by considering inversion-layer capacitance
Negative Bias Temperature Instability of Bulk Fin Field Effect Transistor
Design of Bulk Fin-Type Field-Effect Transistor Considering Gate Work-Function
Current Model of Fully Depleted Nanoscale Surrounding-Gate Metal–Oxide–Semiconductor Field-Effect Transistors with Doped Channel in All Operation Regions
Threshold-Voltage Modeling of Bulk Fin Field Transistors by Considering Surface Potential Lowering
Device Design Consideration for 50 nm Dynamic Random Access Memory Using Bulk FinFET
Threshold Voltage Modeling of Fully Depleted Nanoscale Double-Gate Metal–Oxide–Semiconductor Field-Effect Transistors with Doped Channel by Considering Drain Bias
Impact Ionization Behavior in Bulk Fin Field Effect Transistors with Fin Body Width and Bias Conditions
Compact Current Modeling of Fully Depleted Symmetric Double-Gate Metal–Oxide–Semiconductor Field Effect Transistors with Doped Short-Channel

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