PARK Tai-su | School of Materials Science and Engineering, Seoul National University
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概要
- Park Tai-suの詳細を見る
- 同名の論文著者
- School of Materials Science and Engineering, Seoul National Universityの論文著者
関連著者
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YOON Euijoon
School of Materials Science and Engineering, Seoul National University
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Lee J‐h
School Of Electrical Engineering And Computer Science Kyungpook National Univ.
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Lee Jong-ho
School Of Electrical Engineering Wonkwang University
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PARK Tai-su
School of Materials Science and Engineering, Seoul National University
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Park Tai-su
School Of Materials Science And Engineering Seoul National University
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Yoon Euijoon
School Of Electronic And Electrical Engineering Kyungpook National University
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Lee Jong-ho
School Of Eecs Engineering Kyungpook National University
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Park Tai-su
School Of Material Science Engineering Seoul National University
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Lee Jong-Ho
School of EECS and ISRC, Seoul National University, Seoul 151-742, Korea
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Cho Hye
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Lim Seung-hyun
School Of Materials Science And Engineering And Inter-university Semiconductor Research Center (isrc
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Choi Byung-kil
School Of Electrical Engineering And Computer Science Kyungpook National Univ.
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HAN Kyoung-Rok
School of Electrical Engineering and Computer Science, Kyungpook National Univ.
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CHUNG In-Young
Department of Electronic Engineering, Gyeongsang National University
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CHOE Jeong
Semiconductor R&D Center, Samsung Electronics Co. Ltd.
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PARK Donggun
Semiconductor R&D Center, Samsung Electronics Co. Ltd.
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Song Sukchan
School Of Materials Science And Engineering And Inter-university Semiconductor Research Center (isrc
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LEE Seung-Yoon
School of Materials Science and Engineering, and Inter-university Semiconductor Research Center (ISR
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LEE Gun-Do
School of Materials Science and Engineering, and Inter-university Semiconductor Research Center (ISR
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Lee Gun-do
School Of Materials Science And Engineering And Inter-university Semiconductor Research Center (isrc
著作論文
- Device Design Consideration for 50nm Dynamic Random Access Memory Using Bulk FinFET
- Threshold Voltage Behavior of Body-Tied FinFET (OMEGA MOSFET) with Respect to Ion Implantation Conditions
- Isotropic/Anisotropic Selective Epitaxial Growth of Si on Local Oxidation of Silicon (LOCOS) Patterned Si (100) Substrate by Cold Wall Ultrahigh Vacuum Chemical Vapor Deposition (UHV-CVD)
- [Invited]Double-Gate MOSFETs for Nano CMOS Technology : Body-tied Double-Gate MOSFETs(AWAD2003 : Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices)
- [Invited] Double-Gate MOSFETs for Nano CMOS Technology : Body-tied Double-Gate MOSFETs (AWAD2003 (Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices))