Analytic oxide capacitance model of double- and surrounding-gate metal-oxide-semiconductor field-effect transistors in linear region by considering inversion-layer capacitance

スポンサーリンク

概要

• 論文の詳細を見る
• Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文

著者

• Choi Byung‐kil

  Kyungpook National Univ. Daegu Kor

• Choi Byung-kil

  School Of Electrical Engineering And Computer Science Kyungpook National Univ.

関連論文

• 2-bit/cell Characteristics of High-Density and High-Performance SONOS Flash Memory Cell with Recessed Channel Structure
• Device Design Consideration for 50nm Dynamic Random Access Memory Using Bulk FinFET
• Analytic oxide capacitance model of double- and surrounding-gate metal-oxide-semiconductor field-effect transistors in linear region by considering inversion-layer capacitance
• Compact current modeling of fully depleted symmetric double-gate metal-oxide-semiconductor field effect transistors with doped short-channel
• Negative Bias Temperature Instability of Bulk Fin Field Effect Transistor
• Negative Bias Temperature Instability of Bulk Fin Field Effect Transistor
• Design of Bulk Fin-Type Field-Effect Transistor Considering Gate Work-Function
• Current Model of Fully Depleted Nanoscale Surrounding-Gate Metal–Oxide–Semiconductor Field-Effect Transistors with Doped Channel in All Operation Regions
• Threshold-Voltage Modeling of Bulk Fin Field Transistors by Considering Surface Potential Lowering
• Device Design Consideration for 50 nm Dynamic Random Access Memory Using Bulk FinFET
• Threshold Voltage Modeling of Fully Depleted Nanoscale Double-Gate Metal–Oxide–Semiconductor Field-Effect Transistors with Doped Channel by Considering Drain Bias
• Impact Ionization Behavior in Bulk Fin Field Effect Transistors with Fin Body Width and Bias Conditions
• Compact Current Modeling of Fully Depleted Symmetric Double-Gate Metal–Oxide–Semiconductor Field Effect Transistors with Doped Short-Channel

もっと見る 閉じる

スポンサーリンク