Two-Bit/Cell Characteristics of Silicon–Oxide–Nitride–Oxide–Silicon Flash Memory Devices with Recessed Channel Structure

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概要

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• We proposed a device structure for novel 2-bit/cell silicon–oxide–nitride–oxide–silicon (SONOS) flash memory and characterized the device for sub-50 nm non-volatile memory (NVM) technology. The proposed memory cell has a nitride layer formed on the surface of the recessed channel region for a charge storage node. The threshold voltage window of ${\sim}3$ V was achieved by hot carrier injection under a $V_{\text{GS}}$ of 5 V and a $V_{\text{DS}}$ of 3.5 V for programming. It was shown that counter channel doping near the bottom of the recessed channel is very important and can improve the $V_{\text{th}}$ margin for 2-bit/cell operation by ${\sim}4$ times. By controlling doping profiles of the p-type channel doping and the n-type counter channel doping in the recessed channel region, we could obtain the $V_{\text{th}}$ margin more than ${\sim}2$ V. Moreover, for a bit-programmed cell, reasonable bit-erasing characteristics were also shown.

• Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
• 2008-04-25

著者

• Han Kyoung-rok

  School Of Electrical Engineering And Computer Science Kyungpook National Univ.

• Lee Jong-ho

  School Of Eecs Engineering Kyungpook National University

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