Epitaxial-Template Structure Utilizing Ge-on-Insulator Stripe Arrays with Nanospacing for Advanced Heterogeneous Integration on Si Platform
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概要
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A possible Ge-on-insulator (GOI) structure, namely, stripe arrays with nanospacing, was proposed as a promising epitaxial template structure for the Ge epitaxial layer. Agglomeration-free single-crystalline GOI stripe arrays with thickness of 50 nm and spacing down to 0.5 μm were successfully grown by the Si-seeded rapid-melting growth technique. The growth of GOI stripe arrays with a spacing of 0.1 μm was not achieved owing due to the severe agglomeration of Ge during the heat treatment. This may be due to the small adhesion area of the capping layer between the stripes where it could not withstand the force caused by Ge agglomeration. From the electron backscattering diffraction (EBSD) measurement, the rotational growth was confirmed by the observation of various orientations when the thickness of the Ge layer was reduced to 20 nm. This is probably due to the decrease in the bulk effects that basically act to prevent the slip of lattice planes. These preliminary results provide a breakthrough towards the realization of heterogeneous integration on Si platforms with multifunctionalities.
- 2012-06-25
著者
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Sadoh Taizoh
Department Of Electronics Faculty Of Engineering Kyushu University
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Miyao Masanobu
Department Of Electronics Kyushu University
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Anisuzzaman Mohamad
Department of Electronics, Kyushu University, Fukuoka 819-0395, Japan
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Hashim Abdul
Malaysia-Japan International Institute of Technology, Universiti Teknologi Malaysia, International Campus, Jalan Semarak, 54100 Kuala Lumpur, Malaysia
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Muta Shunpei
Department of Electronics, Kyushu University, Fukuoka 819-0395, Japan
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Hashim Abdul
Malaysia-Japan International Institute of Technology, Universiti Teknologi Malaysia, International Campus, 54100 Kuala Lumpur, Malaysia
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Miyao Masanobu
Department of Electronics, Kyushu University, Fukuoka 819-0395, Japan
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