602 シリコン貫通ビア構造を有する三次元積層半導体チップの熱応力(OS6-1 シリコン貫通ビア技術と強度信頼性)

概要

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The feasibility for cooling and mechanical strength around TSV(Jhrough Silicon Via) structures in 3D SiP(System in Package) were discussed in this study with large scale simulator based on finite element method, ADVENTURECluster[○!R]. Required cooling efficiency for the heat sink of the SiP was shown, and a liquid cooling system has to be considered. Thermal stresses in the chip were shown by elastic stress analysis in TSV were like hydrostatic pressure and the magnitude of the equivalent stress was lower than yield stress of copper. However, it was noticed that that the axial stress in TSV, that was 100 MPa, cannot be ignored. In case that there is a defect in TSV, simulation result showed that the stress applied to Si chip was reduced by defect. However, TSV may be broken due to stress concentration. Unsteady thermal conduction analysis and inelastic thermal stress analysis are necessary to discuss the problem in more detail
一般社団法人日本機械学会の論文
2010-10-09