Layout Dependent Matching Analysis of CMOS Circuits (Special Section on Analog Circuit Techniques and Related Topics)

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概要

• 論文の詳細を見る

• Layout has strong influence on matching properties of a circuit. Current matching models, which characterize both local random non-uniformities and global systematic non-uniformities stochastically, are not adequate for the matching analysis taking the effect of layout realization into account. In order to consider topological information of layout into matching analysis, we propose a matching model which treats the random and systematic components separately. Also, we characterize the micro-loading effect, which modulates fabricated line-width ac cording to the local density of layout patterns, into matching analysis. With these two techniques, we can perform matching analysis of CMOS circuits taking layout information into account.

• 社団法人電子情報通信学会の論文
• 1999-02-25

著者

• Onodera Hidetoshi

  Department of Communications and Computer Engineering, Kyoto University

• Onodera Hidetoshi

  Department Of Communications And Computer Engineering Graduate School Of Informatics Kyoto Universit

• OKADA Kenichi

  Department of Physical Electronics, Graduate School of Science and Engineering, Tokyo Institute of T

• Okada Kenichi

  Department Of Physical Electronics Tokyo Institute Of Technology

• TAMARU Keikichi

  Department of Electronics and Communication, Graduate School of Engineering, Kyoto University

• Tamaru Keikichi

  Department Of Communications And Computer Engineering Kyoto University

• Okada Kenichi

  Department Of Communications And Computer Engineering Kyoto University

• TAMARU Keikichi

  Department of Communications and Computer Engineering, Kyoto University

• Onodera Hidetoshi

  Department of Communication and Computer Engineering, Graduate School of Informatics, Kyoto University, Kyoto 606-8501, Japan

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