Increase in Delay Uncertainty by Performance Optimization(Special Section on VLSI Design and CAD Algorithms)
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概要
- 論文の詳細を見る
This paper discusses a statistical effect of performance optimization to uncertainty in circuit delay. Performance optimization has an effect of balancing the delay of each path in a circuit, i.e. the delay times of long paths are shortened and the delay times of short paths are lengthened. In these path-balanced circuits, the uncertainty in circuit delay, which is caused by delay calculation error, manufacturing variability, fluctuation of operating condition, etc., becomes worse by a statistical characteristic of circuit delay. Thus, a highly-optimized circuit may not satisfy delay constraints. In this paper, we demonstrate some examples that uncertainty in circuit delay is increased by path-balancing, and we then raise a problem that performance optimization increases statistically-distributed circuit delay.
- 社団法人電子情報通信学会の論文
- 2002-12-01
著者
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Onodera Hidetoshi
Department of Communications and Computer Engineering, Kyoto University
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Onodera Hidetoshi
Department Of Communications And Computer Engineering Graduate School Of Informatics Kyoto Universit
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HASHIMOTO Masanori
Department of Information Systems Engineering, Osaka University
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Onodera Hidetoshi
Department Of Communications And Computer Engineering Kyoto University
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Hashimoto Masanori
Department Of Communications And Computer Engineering Kyoto University
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Hashimoto Masanori
Department Of Breast And Endocrine Surgery University Of Tokyo
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