Tamaru Keikichi | Department Of Communications And Computer Engineering Kyoto University

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著作論文

A Memory-Based Parallel Processor for Vector Quantization:FMPP-VQ (Special Issue on New Concept Device and Novel Architecture LSIs)
A Current Mode Cyclic A/D Converter with Submicron Processes (Special Section on Analog Circuit Techniques for System-on-Chip Integration)
Layout Dependent Matching Analysis of CMOS Circuits (Special Section on Analog Circuit Techniques and Related Topics)
A Power and Delay Optimization Method Using Input Reordering in Cell-Based CMOS Circuits
Register-Transfer Module Selection for Sub-Micron ASIC Design : LETTER Special Issue on Synthesis and Verification of Hardware Design
A Floorplan Based Methodology for Data-Path Synthesis of Sub-Micron ASICs (Special Issue on Synthesis and Verification of Hardware Design)
Low Activation Energy by Polarization in a Floating Gate Structure
CAM-Based Array Converter for URR Floating-Point Arithmetic

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