Moshnyaga Vasily | Department Of Electronics Kyoto University
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概要
関連著者
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Moshnyaga Vasily
Department Of Electronics Kyoto University
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モシニャガ ワシリー
Department Of Informatics Kyushu University
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Moshnyaga Vasily
京都大学工学研究科電子通信工学教室
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Moshnyaga Vasily
Department of Electronics, Kyoto University
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Inoue Koji
Department of Cardiology, St.Mariannna University School of Medicine
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Murakami Kazuaki
Department Of Electronics Engineering And Computer Science Fukuoka University
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Murakami Kazuaki
The Authors Are With The Department Of Computer Science And Communication Engineering Kyushu Univers
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Murakami K
Department Of Informatics Kyushu University
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Murakami Kazuaki
Department Of Computer Science And Communication Engineering Kyushu University
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TAMARU Keikichi
Department of Electronics and Communication, Graduate School of Engineering, Kyoto University
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Tamaru Keikichi
Department Of Communications And Computer Engineering Kyoto University
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MORI Yutaka
Department of Radiology, Jikei University School of Medicine
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Mori Yutaka
Department Of Internal Medicine National Hospital Organization Utsunomiya National Hospital
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Masunaga Koichi
Graduate School Of Information Production And Systems Waseda University
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Tamaru Keikichi
Department Of Electronics Kyoto University
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INOUE Koji
Kyushu University
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KOMIYA Reiko
Department of Electronics Engineering and Computer Science, Fukuoka University
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Komiya Reiko
Department Of Electronics Engineering And Computer Science Fukuoka University:institute Of Systems &
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Mori Yutaka
Department Of Chemistry
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Yamanaka Tomoyuki
Department Of Electronics Engineering And Computer Science Fukuoka University
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Mori Yutaka
Department Of Electronics Kyoto University
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Mori Yutaka
Department Of Applied Chemistry Graduate School Of Engineering Osaka City University
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MURAKAMI Kazuaki
Institute of Systems & Information Technologies/KYUSHU
著作論文
- Quantitative Evaluation of State-Preserving Leakage Reduction Algorithm for L1 Data Caches
- Multiplier Energy Reduction by Dynamic Voltage Variation(VLSI Circuit, VLSI Design and CAD Algorithms)
- Register-Transfer Module Selection for Sub-Micron ASIC Design : LETTER Special Issue on Synthesis and Verification of Hardware Design
- A Floorplan Based Methodology for Data-Path Synthesis of Sub-Micron ASICs (Special Issue on Synthesis and Verification of Hardware Design)
- Instruction Encoding for Reducing Power Consumption of I-ROMs Based on Execution Locality
- Trends in High-Performance, Low-Power Cache Memory Architectures
- Omitting Cache Look-up for High-Performance, Low-Power Microprocessors(Special Issue on High-Performance and Low-Power Microprocessors)
- Reduction of Background Computations in Block-Matching Motion Estimation(Video/Image Coding)(Applications and Implementations of Digital Signal Processing)
- Adaptive Bitwidth Compression for Low Power Video Memory Design(Special Section of Selected Papers from the 14th Workshop on Circuits and Systems in Karuizawa)
- Issue Queue Energy Reduction through Dynamic Voltage Scaling(Special Issue on High-Performance and Low-Power Microprocessors)
- A Novel Computationally Adaptive Hardware Algorithm for Video Motion Estimation (Special Issue on Integrated Electronics and New System Paradigms)