A 10T Non-precharge Two-Port SRAM Reducing Readout Power for Video Processing

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概要

• 論文の詳細を見る

• We propose a low-power non-precharge-type two-port SRAM for video processing that exploits statistical similarity in images. To minimize the charge/discharge power on a read bitline, the proposed memory cell (MC) has ten transistors (10T), comprised of the conventional 6T MC, a readout inverter and a transmission gate for a read port. In addition, to incorporate three wordlines, we propose a shared wordline structure, with which the vertical cell size of the 10T MC is fitted to the same size as the conventional 8T MC. Since the readout inverter fully charges/discharges a read bitline, there is no precharge circuit on the read bitline. Thus, power is not consumed by precharging, but is consumed only when a readout datum is changed. This feature is suitable to video processing since image data have spatial correlation and similar data are read out in consecutive cycles. As well as the power reduction, the prechargeless structure shortens a cycle time by 38% compared with the conventional SRAM, because it does not require a precharge period. This, in turn, demonstrates that the proposed SRAM operates at a lower voltage, which achieves further power reduction. Compared to the conventional 8T SRAM, the proposed SRAM reduces a charge/discharge possibility to 19% (81% saving) on the bitlines. As the measurement result, we confirmed that the proposed 64-kb video memory in a 90-nm process achieves an 85% power saving on the read bitline, when considered as an H.264 reconstructed image memory. The area overhead is 14.4%.

• （社）電子情報通信学会の論文
• 2008-04-01

著者

• Iguchi Yusuke

  Kobe Univ. Kobe‐shi Jpn

• Nii Koji

  Kobe University:renesas Technology Corporation

• Noguchi Hiroki

  Kobe University

• Yoshimoto Masahiko

  Mitsubishi Electric Corporation

• Kawaguchi Hiroshi

  Kobe Univ. Kobe‐shi Jpn

• Nii Koji

  Kobe University

• Morita Yasuhiro

  Department Of Computer Science And Systems Engineering Kobe University

• YOSHIMOTO Masahiko

  Kobe University

• FUJIWARA Hidehiro

  Kobe University

• OKUMURA Shunsuke

  Kobe University

• MORITA Yasuhiro

  Kobe University

• Kawaguchi Hiroshi

  Department Of Computer Science And Systems Engineering Kobe University

• Yoshimoto Masahiko

  Department Of Computer Science And Systems Engineering Kobe University

• Yoshimoto Masahiko

  System Lsi Development Center Mitsubishi Electric Corporation

• Yoshimoto M

  Department Of Computer Science And Systems Engineering Kobe University

• FUJIWARA Hidehiro

  the Graduate School of Science and Technology, Kobe University

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