Improving the Cell Characteristics Using SiN Liner at Active Edge in 4 Gbits NAND Flash Memories

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概要

• 論文の詳細を見る

• We introduced the self aligned floating poly (SAP) process using the SiN liner at active edge to improve the cell characteristics of high density NAND flash memory devices. Capacitance and electric field at corner of active edge are related to on cell current and cell $V_{\text{th}}$ distributions. In a 70 nm design rule NAND flash cell, we can improve the about 0.2 μA of worst on cell current and cell $V_{\text{th}}$ distributions of 0.5 V respectively. Furthermore, we acknowledged that off cell current of SiN liner is lower than that of oxide liner.

• 2008-04-25

著者

• Lee Jong

  School Of Adv. Mat. Sci. & Eng. Sungkyunkwan Univ.

• KIM Jun

  School of Electrical Engineering, Seoul National University

• Shin Hyungcheol

  School Of Electrical Engineering And Computer Science Seoul National University

• Kang Daewoong

  School Of Electrical Engineering Seoul National University

• Lee Jae

  School Of Computer Science And Engineering Seoul National University

• Shin Hyungcheol

  School of Electrical Engineering, Seoul National University, San 56-1, Shinlim-dong, Kwanak-gu, Seoul 151-742, Korea

• Park Byung-Gook

  School of Electrical Engineering, Seoul National University, San 56-1, Shinlim-dong, Kwanak-gu, Seoul 151-742, Korea

• Park Byung-Gook

  School of Electrical Engineering and Computer Science, Seoul National University, San 56-1, Shinlim-Dong, Kwanak-Gu, Seoul 151-742, Korea

• Lee Jae

  School of Electrical Engineering, Seoul National University, San 56-1, Shinlim-dong, Kwanak-gu, Seoul 151-742, Korea

• Jang Sungnam

  SRAM/FLASH PA Team, Memory Business, Samsung Electronics Co., Ltd., San #24 Nongseo-ri, Kiheung-eup, Yongin, Kyunggi 449-711, Korea

• Lee Kyongjoo

  SRAM/FLASH PA Team, Memory Business, Samsung Electronics Co., Ltd., San #24 Nongseo-ri, Kiheung-eup, Yongin, Kyunggi 449-711, Korea

• Kim Jinjoo

  SRAM/FLASH PA Team, Memory Business, Samsung Electronics Co., Ltd., San #24 Nongseo-ri, Kiheung-eup, Yongin, Kyunggi 449-711, Korea

• Chang Dongwon

  SRAM/FLASH PA Team, Memory Business, Samsung Electronics Co., Ltd., San #24 Nongseo-ri, Kiheung-eup, Yongin, Kyunggi 449-711, Korea

• Kwon Hyukje

  SRAM/FLASH PA Team, Memory Business, Samsung Electronics Co., Ltd., San #24 Nongseo-ri, Kiheung-eup, Yongin, Kyunggi 449-711, Korea

• Lee Wonseong

  SRAM/FLASH PA Team, Memory Business, Samsung Electronics Co., Ltd., San #24 Nongseo-ri, Kiheung-eup, Yongin, Kyunggi 449-711, Korea

• Park Il-Han

  School of Electrical Engineering, Seoul National University, San 56-1, Shinlim-dong, Kwanak-gu, Seoul 151-742, Korea

• Park Byung-Gook

  School of Electrical Engineering & Inter-University Semiconductor Research Center (ISRC), Seoul National University, Shilim-Dong, Kwanak-Gu, Seoul 151-742, Republic of Korea

• Shin Hyungcheol

  School of Electrical Eng.

• Park Byung-Gook

  School of EECS and ISRC, Seoul National University, Seoul 151-742, Korea

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