Highly Manufacturable and Reliable 80-nm Gate Twin Silicon–Oxide–Nitride–Oxide–Silicon Memory Transistor

概要

論文の詳細を見る
Thanks to the combination of damascene gate and outer poly-Si sidewall spacer process, we have successfully fabricated twin silicon–oxide–nitride–oxide–silicon (SONOS) memory (TSM) transistors with 20-nm twin nitride storage nodes under an 80-nm gate. In terms of device manufacturability, the damascene gate process makes it possible to realize physically separated structure and the outer poly-Si sidewall spacer scheme contributes to realization of 20-nm long nitride storage node. Compared with conventional SONOS transistor, the fabricated TSM transistor maintains its threshold voltage margin between the forward and reverse reads down to 80-nm long gate. The TSM transistor also shows stable and reliable characteristics: up to $10^{5}$ program/erase cycles endurance and fairly good bake retention at 150°C.
Japan Society of Applied Physicsの論文
2005-09-10