Ultrashallow Junction Formation Using Novel Plasma Doping Technology beyond 50 nm MOS Devices
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概要
- 論文の詳細を見る
In this paper, we demonstrate a novel plasma ion-shower doping (PLAD) technique for fabricating a nanoscale silicon-on-insulator metal-oxide-semiconductor field effect transistors (SOI MOSFETs). The source drain (S/D) extensions of the SOI n-MOSFETs were formed by elevated-temperature (ET) PLAD. Even though activation annealing after PLAD was excluded to minimize the diffusion of dopants, which resulted in laterally abrupt S/D junction, we obtained a low sheet resistance of 920 $\Omega/\square$ by the ET PLAD at 230°C. The fabricated SOI n-MOSFET with a gate length of 50 nm adopted in the proposed junction formation technique showed suppressed short-channel effects. The successful operation of a MOSFET with a high-$\kappa$ gate dielectric and metal gate revealed that the proposed junction formation technique is compatible with devices made of low-thermal-budget material.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2005-04-15
著者
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Baek In-bok
Nano Bio-electric Devices Team It Convergence & Components Laboratory Etri
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Yang Jong-Heon
Nano Bio-electric Devices Team, IT Convergence & Components Laboratory
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LEE Seongjae
Nano Electronic Device Team, Future Technology Research Division, Electronics and Telecommunications
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BAEK Sungkweon
Gwangju Institute of Science and Technology
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Im Kiju
Nano Bio-electric Devices Team It Convergence & Components Laboratory Etri
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Cho Won-ju
Department Of Electronic Material Engineering Kwangwoon University
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Ahn Chang-geun
Nano Bio-electric Devices Team It Convergence & Components Laboratory Etri
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Hwang Hyunsang
Gwangju Inst. Sci. And Technol. (gist) Gwangju Kor
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Baek In-Bok
Nano Electronic Device Team, Future Technology Research Division, Electronics and Telecommunications Research Institute, 161, Gajeong-dong, Yuseong-gu, Daejon 305-360, Republic of Korea
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Yang Jong-Heon
Nano Electronic Device Team, Future Technology Research Division, Electronics and Telecommunications Research Institute, 161, Gajeong-dong, Yuseong-gu, Daejon 305-360, Republic of Korea
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Im Kiju
Nano Electronic Device Team, Future Technology Research Division, Electronics and Telecommunications Research Institute, 161, Gajeong-dong, Yuseong-gu, Daejon 305-360, Republic of Korea
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Ahn Chang-Geun
Nano Electronic Device Team, Future Technology Research Division, Electronics and Telecommunications Research Institute, 161, Gajeong-dong, Yuseong-gu, Daejon 305-360, Republic of Korea
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Cho Won-ju
Department of Semiconductor and New Materials, College of Electronics & Information, Kwangwoon University, 447-1, Wolgye-Dong, Nowon-Gu 139-701, Republic of Korea
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Hwang Hyunsang
Gwangju Institute of Science and Technology, 1, Oryong-dong, Buk-gu, Gwangju 500-712, Republic of Korea
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Lee Seongjae
Nano Electronic Device Team, Fundamental Technology Department, Future Technology Research Division, Electronics and Telecommunications Research Institute, 161 Gajeong-dong, Yuseong-gu, Daejon 305-360, Korea
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Lee Seongjae
Nano Electronic Device Team, Future Technology Research Division, Electronics and Telecommunications Research Institute, 161, Gajeong-dong, Yuseong-gu, Daejon 305-360, Republic of Korea
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Baek Sungkweon
Gwangju Institute of Science and Technology, 1, Oryong-dong, Buk-gu, Gwangju 500-712, Republic of Korea
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