Ultra-Shallow Junction Formation using Novel Plasma Doping Technology beyond 50nm MOS Devices
スポンサーリンク
概要
- 論文の詳細を見る
- 2004-09-15
著者
-
Lee Seong-jae
Nano Bio-electric Devices Team It Convergence & Components Laboratory Etri
-
Im K
Nano Bio-electric Devices Team It Convergence & Components Laboratory Etri
-
Baek In-bok
Nano Bio-electric Devices Team It Convergence & Components Laboratory Etri
-
AHN Chang-Geun
Nano-Bio Electronic Devices Team, Electronics and Telecommunications Research Institute
-
YANG Jong-Heon
Nano-Bio Electronic Devices Team, Electronics and Telecommunications Research Institute
-
CHO Won-ju
Nanoelectronic Devices Team, Future Technology Research Division, ETRI
-
IM Kiju
Nanoelectronic Devices Team, Future Technology Research Division, ETRI
-
AHN Chang-Geun
Nanoelectronic Devices Team, Future Technology Research Division, ETRI
-
YANG Jong-Heon
Nanoelectronic Devices Team, Future Technology Research Division, ETRI
-
BAEK In-Bok
Nanoelectronic Devices Team, Future Technology Research Division, ETRI
-
LEE Seongjae
Nanoelectronic Devices Team, Future Technology Research Division, ETRI
-
Cho Won-ju
Electronics Materials Kwangwoon University
-
Ahn C‐g
Electronics And Telecommunications Res. Inst. Daejon Kor
-
Ahn Chang-geun
Department Of Electronic And Electrical Engineering Pohang University Of Science And Technology
-
Cho W‐j
Lg Semicon Co. Ltd.
-
Cho W‐j
Electronics Materials Kwangwoon University
-
Ahn Chang-geun
Nano Bio-electric Devices Team It Convergence & Components Laboratory Etri
-
Yang Jong-heon
Nano-bio Electronic Devices Team Electronics And Telecommunications Research Institute
関連論文
- 3-D stacked CMOS inverters using laser crystallized poly-Si film TFTs (Electron devices: 第15回先端半導体デバイスの基礎と応用に関するアジア・太平洋ワークショップ(AWAD2007))
- 3-D stacked CMOS inverters using laser crystallized poly-Si film TFTs (Silicon devices and materials: 第15回先端半導体デバイスの基礎と応用に関するアジア・太平洋ワークショップ(AWAD2007))
- A two-layer stacked polycrystalline silicon thin film transistor complementary metal oxide semiconductor inverters using laser crystallized channel with high-k and metal gate on Si (Special issue: Solid state devices and materials)
- Fabrication of Two-Layer stacked Poly-Si TFT CMOS Inverters Using Laser Crystallized channel with metal gate on Si Substrate
- SOI-Based Nanoscale CMOS Device Technology(Session 6A Silicon Devices III,AWAD2006)
- Analysis of Interface Property of SiGe-On-Insulator (SGOI) Substrate with a Strained-Si Layer for Nano-CMOS Device Applications(Session 4 Silicon Devices II,AWAD2006)
- SOI-Based Nanoscale CMOS Device Technology(Session 6A Silicon Devices III,AWAD2006)
- Analysis of Interface Property of SiGe-On-Insulator (SGOI) Substrate with a Strained-Si Layer for Nano-CMOS Device Applications(Session 4 Silicon Devices II,AWAD2006)
- SOI-Based Nanoscale CMOS Device Technology
- Analysis of Interface Property of SiGe-On-Insulator (SGOI) Substrate with a Strained-Si Layer for Nano-CMOS Device Applications
- Analysis of Interface Property of SiGe-On-Insulator (SGOI) Substrate with a Strained-Si Layer for Nano-CMOS Device Applications
- Ultrashallow Junction Formation Using Novel Plasma Doping Technology beyond 50nm MOS Devices
- Ultra-Shallow Junction Formation using Novel Plasma Doping Technology beyond 50nm MOS Devices
- Fabrication of 50nm Trigate Silicon On Insulator Metal-Oxide-Silicon Field-Effect Transistor without Source/Drain Activation Annealing
- Dependence of Reverse Narrow Width Effect and Sub-threshold Hump Characteristics on the Gate length
- Dependence of Reverse Narrow Width Effect and Sub-threshold Hump Characteristics on the Gate length
- Dependence of Reverse Narrow Width Effect and Sub-threshold Hump Characteristics on the Gate length
- Electrical Characterization of Nano-Floating Gated Silicon-on-Insulator Memory with In_2O_3 Nano-Particles Embedded in Polyimide Insulator
- Electrical characterization of nano-floating gated silicon-on-insulator memory with In2O3 nano-particles embedded in polyimide insulator (Electron devices: 第15回先端半導体デバイスの基礎と応用に関するアジア・太平洋ワークショップ(AWAD2007))
- Electrical characterization of nano-floating gated silicon-on-insulator memory with In2O3 nano-particles embedded in polyimide insulator (Silicon devices and materials: 第15回先端半導体デバイスの基礎と応用に関するアジア・太平洋ワークショップ(AWAD2007))
- Low Temperature (≤550℃) Fabrication of CMOS TFT's on Rapid-Thermal CVD Polycrystalline Silicon-Germanium Films
- Low Temperature(≦550℃) CMOS Thin-Film Transistors in RTCVD Poly-Si_Ge_ Films
- 1.55 μm Gain in a Short Er^ -doped Zirconium Fluoride Glass Fiber
- Low temperature Poly-Si TFT nonvolatile memory devices with In_2O_3 nano-particles embedded in polyimide
- Effects of Segregated Ge on Electrical Properties of SiO_2/SiGe Interface
- Size and Interface State Dependence of the Luminescence Properties Si Nanocrystals
- A Two-Layer Stacked Polycrystalline Silicon Thin Film Transistor Complementary Metal Oxide Semiconductor Inverters Using Laser Crystallized Channel with High-$k$ and Metal Gate on Si
- Ultrashallow Junction Formation Using Novel Plasma Doping Technology beyond 50 nm MOS Devices
- Fabrication of 50 nm Trigate Silicon On Insulator Metal–Oxide–Silicon Field-Effect Transistor without Source/Drain Activation Annealing