Ahn Chang-geun | Department Of Electronic And Electrical Engineering Pohang University Of Science And Technology

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概要

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著作論文

A two-layer stacked polycrystalline silicon thin film transistor complementary metal oxide semiconductor inverters using laser crystallized channel with high-k and metal gate on Si (Special issue: Solid state devices and materials)
Fabrication of Two-Layer stacked Poly-Si TFT CMOS Inverters Using Laser Crystallized channel with metal gate on Si Substrate
SOI-Based Nanoscale CMOS Device Technology(Session 6A Silicon Devices III,AWAD2006)
Analysis of Interface Property of SiGe-On-Insulator (SGOI) Substrate with a Strained-Si Layer for Nano-CMOS Device Applications(Session 4 Silicon Devices II,AWAD2006)
SOI-Based Nanoscale CMOS Device Technology(Session 6A Silicon Devices III,AWAD2006)
Analysis of Interface Property of SiGe-On-Insulator (SGOI) Substrate with a Strained-Si Layer for Nano-CMOS Device Applications(Session 4 Silicon Devices II,AWAD2006)
SOI-Based Nanoscale CMOS Device Technology
Analysis of Interface Property of SiGe-On-Insulator (SGOI) Substrate with a Strained-Si Layer for Nano-CMOS Device Applications
Analysis of Interface Property of SiGe-On-Insulator (SGOI) Substrate with a Strained-Si Layer for Nano-CMOS Device Applications
Ultrashallow Junction Formation Using Novel Plasma Doping Technology beyond 50nm MOS Devices
Ultra-Shallow Junction Formation using Novel Plasma Doping Technology beyond 50nm MOS Devices
Fabrication of 50nm Trigate Silicon On Insulator Metal-Oxide-Silicon Field-Effect Transistor without Source/Drain Activation Annealing
Low Temperature (≤550℃) Fabrication of CMOS TFT's on Rapid-Thermal CVD Polycrystalline Silicon-Germanium Films
Low Temperature(≦550℃) CMOS Thin-Film Transistors in RTCVD Poly-Si_Ge_ Films
Effects of Segregated Ge on Electrical Properties of SiO_2/SiGe Interface
Size and Interface State Dependence of the Luminescence Properties Si Nanocrystals

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