Electrical Characteristics of Thin HfO2 Gate Dielectrics Prepared Using Different Pre-Deposition Surface Treatments
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概要
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We have investigated the effects that various pre-deposition surface treatments, such as HF dipping (HF-dipped), NH3 surface nitridation (NH3-annealed), and rapid thermal oxidation (RTO-treated), have on the electrical properties of HfO2 gate dielectrics. The NH3-annealed technique is superior to the others because the dielectric subject to NH3 surface nitridation possesses a tremendously reduced leakage current, the lowest equivalent oxide thickness (EOT), and a moderate hysteresis width. In contrast, the RTO-treated preparation can only effectively reduce the leakage current by its resultant increased physical thickness and displays considerably severe hysteresis. We have also studied the dependence of hysteresis on the initial inversion bias ($V_{\text{inv}}$), temperature, and frequency for all splits. The hysteresis width increases upon increasing the initial inversion bias and decreasing the temperature, but it is rather insensitive to the measuring frequency. In addition, our experimental results indicate that the hysteresis width depends exponentially on both the initial inversion bias and the temperature, and it can be described well by a general empirical relationship that has the form $C(T)\cdot\exp(R_{\text{v}}V_{\text{inv}})$. Finally, the conduction currents through the dielectrics are probably dominated by trap-assisted tunneling (TAT) because the current densities display stronger temperature dependence at low voltage than they do at higher voltages. Based on the trap-assisted tunneling model, the corresponding parameters have been extracted and are presented.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2005-01-15
著者
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CHIEN Chao-Hsin
National Nano Device Laboratories
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Tsui Bing-yue
Institute Of Electronics National Chiao-tung University
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Lehnen Peer
Aixtron Ag Kackertstr
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LIANG Jann-Shyang
Institute of Electronics, National Chiao-Tung University
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Yang Ming-jui
National Nano Device Laboratories
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Perng Tsu-hsiu
Institute Of Electronics National Chiao-tung University
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Chang Chun-yen
Institute Of Electronics National Chiao Tang University:national Nano-device Laboratories
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Chen Ching-wei
Institute Of Electronics National Chiao-tung University
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Chang Chun-Yen
Institute of Electronics, National Chiao-Tung University, Hsinchu 300, Taiwan
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Tsui Bing-Yue
Institute of Electronics, National Chiao-Tung University, Hsinchu 300, Taiwan
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Liang Jann-Shyang
Institute of Electronics, National Chiao-Tung University, Hsinchu 300, Taiwan
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Chen Ching-Wei
Institute of Electronics, National Chiao-Tung University, Hsinchu 300, Taiwan
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Yang Ming-Jui
National Nano Device Laboratory, Hsinchu 300, Taiwan
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Chien Chao-Hsin
National Nano Device Laboratory, Hsinchu 300, Taiwan
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Lehnen Peer
Aixtron AG, Kackertstr, 15-17 Aachen 52072, Germany
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Perng Tsu-Hsiu
Institute of Electronics, National Chiao-Tung University, Hsinchu 300, Taiwan
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