A Bipolar-Based 0.5μm BiCMOS Technology on Bonded SOI for High-Speed LSIs (Special Section on High Speed and High Density Multi Functional LSI Memories)
スポンサーリンク
概要
- 論文の詳細を見る
A new BiCMOS process based on a high-speed bipolar process with 0.5μm emitter width has been developed using a bonded SOI substrate. Double polysilicon bipolar transistors with the trench isolation, shallow junctions and the pedestal collector implantation provide a high cut-off frequency of 27 GHz. Stress induced device degradation is carefully examined and a low stress trench isolation process is proposed.
- 社団法人電子情報通信学会の論文
- 1994-08-25
著者
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丹波 展雄
日立製作所デバイス開発センタ
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Ikeda Tokihiro
Atomic Phys. Lab. Riken
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Hiramoto Toshirou
Device Development Center Hitachi Ltd.
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Yoshida Makoto
the Device Development Center, Hitachi Ltd.
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Hiramoto Toshiro
the Device Development Center, Hitachi Ltd.
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Fujiwara Tsuyoshi
the Device Development Center, Hitachi Ltd.
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Hashimoto Takashi
the Device Development Center, Hitachi Ltd.
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Muraya Tetsuya
the Device Development Center, Hitachi Ltd.
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Murata Shigeharu
the Device Development Center, Hitachi Ltd.
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Watanabe Kunihiko
the Device Development Center, Hitachi Ltd.
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Tamba Nobuo
the Device Development Center, Hitachi Ltd.
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Ikeda Takahide
the Device Development Center, Hitachi Ltd.
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Tamba Nobuo
The Device Development Center Hitachi Ltd.
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Murata Shigeharu
Device Development Center, Hitachi, Ltd.
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Watanabe Kunihiko
The Device Development Center Hitachi Ltd.
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Fujiwara Tsuyoshi
The Device Development Center Hitachi Ltd.
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Muraya Tetsuya
The Device Development Center Hitachi Ltd.
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Murata Shigeharu
Device Development Center Hitachi Ltd.
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Yoshida Makoto
The Device Development Center Hitachi Ltd.
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