A Novel Laser Annealing Process for Advanced CMOS with Suppressed Gate Depletion and Ultra-shallow Junctions
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概要
- 論文の詳細を見る
- 2006-09-13
著者
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Wang Yun
Ultratech Inc.
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MINE Toshiyuki
Central Research Laboratory, Hitachi, Ltd.
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TORII Kazuyoshi
Central Research Laboratory, Hitachi, Ltd.
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Torii Kazuyoshi
Central Research Laboratory Hitachi Lid.
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Mine Toshiyuki
Central Research Laboratory Hitachi Ltd
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Mine Toshiyuki
Central Research Laboratory Hitachi Ltd.
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SHIMA Akio
Central Research Laboratory, Hitachi, Ltd.
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FENG Lucia
Ultratech Inc.
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WANG Xiaoru
Ultratech Inc.
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Shima Akio
Central Research Laboratory Hitachi Ltd.
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