Realization of Low CoSi_2/p^+-Silicon Contact Resistance with Low Junction Leakage Current and Junction Capacitance Using Laser Thermal Process

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概要

• 論文の詳細を見る
• Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
• 2005-11-30

著者

• Wang Yun

  Ultratech Inc.

• YAMAMOTO Tomonari

  Fujitsu Ltd.

• KUBO Tomohiro

  Fujitsu Ltd.

• TALWAR Somit

  Ultratech Inc.

• KASE Masataka

  Fujitsu Ltd.

• Yamamoto Tomonari

  Fujitsu Laboratories Ltd.

関連論文

• Realization of Low CoSi_2/p^+-Silicon Contact Resistance with Low Junction Leakage Current and Junction Capacitance Using Laser Thermal Process
• Suppression of Gate Depletion in p^+-Polysilicon-Gated Sub-40nm pMOSFETs by Laser Thermal Processing
• Depth Profile of Various Bonding Configration of Nitrogen Atoms in Silicon Oxynitrides formed by Plasma Nitridation
• Scenario of Source/Drain Extension and Halo Engineering for High Performance 50nm SOI-pMOSFET
• A Novel Laser Annealing Process for Advanced CMOS with Suppressed Gate Depletion and Ultra-shallow Junctions
• Photoresist Removal Using Atomic Hydrogen Generated by Hot-Wire Catalyzer and Effects on Si-Wafer Surface
• Dependence of Sheet Resistance of CoSi2 with Gate Length of 30 nm on Thickness of Titanium Nitride Capping Layer in Co-Salicide Process
• Suppression of Gate Depletion in p+-Polysilicon-Gated Sub-40 nm pMOSFETs by Laser Thermal Processing

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