Design of RFID Front-end Circuitry Enabling CDMA-based Collision Resistance
スポンサーリンク
概要
- 論文の詳細を見る
- 2004-09-15
著者
-
Fukumizu Yohei
Graduate School Of Science And Technology Kobe University
-
NAGATA Makoto
Department of Computer and Systems Engineering, Kobe University
-
TAKI Kazuo
AIL Co., Ltd.
-
OHNO Shuji
the Graduate School of Science and Technology, Kobe University
-
Ohno Shuji
The Graduate School Of Science And Technology Kobe University
-
Taki Kazuo
Ail Co. Ltd.
-
Taki Kazuo
Department Of Life And Environmental Sciences Chiba Institute Of Technology
-
Nagata Makoto
Kobe Univ. Kobe‐shi Jpn
-
Nagata Makoto
Graduate School Of System Informatics Kobe University
-
OHNO Shuji
Graduate School of Science and Technology, Kobe University
-
Nagata Makoto
Department Of Computer And Systems Engineering Kobe University
-
TAKI Kazuo
Department of Computer and Systems Engineering, Kobe University
関連論文
- Ehlers-Danlos Syndrome Type IV, Vascular Type, Which Demonstrated a Novel Point Mutation in the COL3A1 Gene
- A Mixed Circuit and System Level Simulation Technique of Collision-Resistant RFID System(Analog Circuits and Related SoC Integration Technologies)
- Back-End Design of a Collision-Resistive RFID System through High-Level Modeling Approach(Novel Device Architectures and System Integration Technologies)
- Communication Scheme for a Highly Collision-Resistive RFID System( Analog Circuit Techniques and Related Topics)
- MYOCARDIAL SYMPATHETIC ACTIVITY IN DOXORUBICIN (DOX)-INDUCED CARDIOTOXICITY IN RATS : RI : 53 Annual Scientific Meeting, Japanese Circulation Society
- PJ-065 Value of Late Gadolinium Enhancement by Magnetic Resonance in Patients with Cardiac Sarcoidosis : Characteristic Findings and Clinical Utility(PJ011,CT/MRI (Myocardium) 4 (I),Poster Session (Japanese),The 73rd Annual Scientific Meeting of The Japan
- -0043-EFFECTS OF METOPROLOL ON CARDIAC ADRENERGIC INNERVATION IN DOXORUBICIN (DOX)-INDUCED MYOCARDIAL DAMAGE IN RATS
- Immunohistochemical Localization of Endothelin in Cardiovascular Disease
- -1089-DETEVTION OF MYOCARDIAL DAMAGE IN DOXORUBICIN CARDIOMYOPATHY OF RAT BY IN-111 ANTIMYOSIN ANTIBODY : THE 54th ANNUAL SCIENTIFIC MEETING OF THE JAPANESE CIRCULATION SOCIETY
- Image Segmentation/Extraction Using Nonlinear Cellular Networks and Their VLSI Implementation Using Pulse-Modulation Techniques(Special Section on Analog Circuit Techniques and Relate)
- A 1-D CMOS PWM Cellular Neural Network Circuit and Resistive-Fuse Network Operation
- Image Object Extraction Using Resistive-Fuse and Oscillator Networks and a Pulse-Modulation Circuit for Their LSI Implementation
- Chip-to-Chip Half Duplex Spiking Data Communication over Power Supply Rails
- Pulse Modulation Techniques for Nonlinear Dynamical Systems and a CMOS Chaos Circuit with Arbitrary 1-D Maps(New System Paradigms for Integrated Electronics)
- An Hadamard Transform Chip Using the PWM Circuit Technique and Its Application to Image Processing(Special Issue on High-Performance Analog Integrated Circuits)
- A CMOS Stochastic Associative Processor Using PWM Chaotic Signals(Special Issue on Integrated Systems with New Concepts)
- Bio-Inspired VLSIs Based on Analog/Digital Merged Technologies
- Merged Analog-Digital Circuits Using Pulse Modulation for Intellingent SoC Applications (Special Section on Analog Circuit Techniques Supporting the System LSI Era)
- A High-Resolution Hadamard Transform Circuit Using Pulse Width Modulation Technique
- A Multi-Quantum-Dot Associative Circuit Using Thermal-Noise Assisted Tunneling
- A Nonlinear Oscillator Network for Gray-Level Image Segmentation and PWM / PPM Circuits for Its VLSI Implementation(Special Section on Intelligent Signal and Image Processing)
- New Non-Volatile Analog Memory Circuits Using PWM Methods (Special Issue on Integrated Electronics and New System Paradigms)
- A Stochastic Association Circuit Using PWM Chaotic Signals
- A Pattern Matching Processor Using Analog-Digital Merged Architecture Based on Pulse Width Modulation
- An Analog-Digital Merged Neural Circuit Using Pulse Width Modulation Technique (Special Section on Analog Circuit Techniques and Related Topics)
- A Stochastic Associative Memory Using Single-Electron Devices and Its Application in Digit Pattern Association
- A Stochastic Associative Memory Using Single-Electron Tunneling Devices (Special Issue on Technology Challenges for Single Electron Devices)
- Localization and Quantum Hall Effect in Two-Dimensional Systems Under Strong Magnetic Fields(Transport and Fermiology)
- Experimental Evaluation of Dynamic Power Supply Noise and Logical Failures in Microprocessor Operations
- Breakdown of the Quantum Hall Effect in GaAs/AlGaAs Heterostructures Due to Current
- Peptide nucleic acid-locked nucleic acid polymerase chain reaction clamp-based detection test for gefitinib-refractory T790M epidermal growth factor receptor mutation
- Current-Mode Transceiver with Nonfeedback Clock Recovery Capability for Mobile Applications
- Chip-Level Substrate Coupling Analysis with Reference Structures for Verification(Physical Design,VLSI Design and CAD Algorithms)
- Evaluation of Isolation Structures against High-Frequency Substrate Coupling in Analog/Mixed-Signal Integrated Circuits(Analog Circuit Techniques and Related Topics)
- An Arbitrary Digital Power Noise Generator Using 65nm CMOS Technology
- Modeling of Power Noise Generation in Standard-Cell Based CMOS Digital Circuits
- On-Die Monitoring of Substrate Coupling for Mixed-Signal Circuit Isolation
- Spatial variation of phosphorus fractions in bottom sediments and the potential contributions to eutrophication in shallow lakes
- Estimation of Environmental Impact for Water Quality in Lakes with Regard to Entropy Index
- Measurement-Based Analysis of Electromagnetic Immunity in LSI Circuit Operation
- Experimental Verification of Power Supply Noise Modeling for EMI Analysis through On-Board and On-Chip Noise Measurements(Analog Circuits and Related SoC Integration Technologies)
- An Integrated Timing and Dynamic Supply Noise Verification for Multi-10-Million Gate SoC Designs(Novel Device Architectures and System Integration Technologies)
- Association of Tumor Necrosis Factor-α and Neutrophilic Inflammation in Severe Asthma
- Tulobuterol, a β2-agonist, Attenuates Eosinophil Adhesion to Endothelial Cells
- Design of RFID Front-end Circuitry Enabling CDMA-based Collision Resistance
- Electrical Activity of the Human Retina in Vitro(SYMPOSIUM ON ELECTRORETINOGRAPHY)
- Asymmetric Slope Dual Mode Differential Logic Circuit for Compatibility of Low-Power and High-Speed Operations(Digital,Low-Power, High-Speed LSIs and Related Technologies)
- Logic Synthesis Technique for High Speed Differential Dynamic Logic with Asymmetric Slope Transition(Logic Synthesis, VLSI Design and CAD Algorithms)
- Dynamic Power-Supply and Well Noise Measurements and Analysis for Low Power Body Biased Circuits(Digital, Low-Power LSI and Low-Power IP)
- Substrate-Noise and Random-Variability Reduction with Self-Adjusted Forward Body Bias(Digital,Low-Power, High-Speed LSIs and Related Technologies)
- A Continuous-Time Waveform Monitoring Technique for On-Chip Power Noise Measurements in VLSI Circuits
- On-Chip Single Tone Pseudo-Noise Generator for Analog IP Noise Tolerance Measurement
- On-Chip Multi-Channel Monitoring for Analog Circuit Diagnosis in Systems-on-Chip Integration(Analog Circuits and Related SoC Integration Technologies)
- An On-Chip Multi-Channel Rail-to-Rail Signal Monitoring Technique for Sub-100-nm Digital Signal Integrity(Analog Circuit and Device Technologies)
- Measurement-Based Analysis of Delay Variation Induced by Dynamic Power Supply Noise(Novel Device Architectures and System Integration Technologies)
- Allergen Immunotherapy in Asthma : Current Status and Future Perspectives
- A Diagnosis Testbench of Analog IP Cores for Characterization of Substrate Coupling Strength
- Modeling and Analysis of Substrate Noise Coupling in Analog and RF ICs
- Differential effects of corticosteroids and theophylline on the adhesive interaction between eosinophils and endothelial cells
- On-Chip In-Place Measurements of V_ and Signal/Substrate Response of Differential Pair Transistors
- Co-simulation of On-Chip and On-Board AC Power Noise of CMOS Digital Circuits
- FOREWORD
- On-Die Monitoring of Substrate Coupling for Mixed-Signal Circuit Isolation
- False Operation of Static Random Access Memory Cells under Alternating Current Power Supply Voltage Variation
- Reference Complementary Metal–Oxide–Semiconductor Circuits and Test Structures for Evaluation of Dynamic Noise in Power Delivery Networks
- Design of Effective Supply Voltage Monitor for Measuring Power Rails of Integrated Circuits
- Measurements and Simulation of Sensitivity of Differential-Pair Transistors against Substrate Voltage Variation
- False Operation of Static Random Access Memory Cells under Alternating Current Power Supply Voltage Variation (Special Issue : Solid State Devices and Materials)
- A Fast Power Current Simulation of Cryptographic VLSI Circuits for Side Channel Attack Evaluation
- Performance Evaluation of Probing Front-End Circuits for On-Chip Noise Monitoring
- High-Speed Digital Circuit Design Using Differential Logic with Asymmetric Signal Transition(Electronic Circuits)