A Nonlinear Oscillator Network for Gray-Level Image Segmentation and PWM / PPM Circuits for Its VLSI Implementation(Special Section on Intelligent Signal and Image Processing)
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概要
- 論文の詳細を見る
This paper proposes a nonlinear oscillator network model for gray-level image segmentation suitable for massively parallel VLSI implementation.The model performs image segmentation in parallel using nonlinear analog dynamics.Because of the limited calculation precision in VLSI implementation, it is important to estimate the calculation precision required for proper operation.By numerical simulation, the necessary precision is estimated to be 5bits.We propose a nonlinear oscillator network circuit using the pulse modulation approach suitable for an analog-digital merged circuit architecture.The basic operations of the nonlinear oscillator circuit and the connection weight circuit are confirmed by SPICE circuit simulation.The circuit simulation results also demonstrate that image segmentation can be performed within the order of 100μs.
- 社団法人電子情報通信学会の論文
- 2000-02-25
著者
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NAGATA Makoto
Department of Computer and Systems Engineering, Kobe University
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Iwata A
Hiroshima Univ. Higashi-hiroshima‐shi Jpn
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Morie T
Graduate School Of Life Science And Systems Engineering Kyushu Institute Of Technology
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IWATA Atsushi
A-R-Tec Corporation
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ANDO Hiroshi
the Faculty of Engineering, Hiroshima University
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MORIE Takashi
the Faculty of Engineering, Hiroshima University
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NAGATA Makoto
the Faculty of Engineering, Hiroshima University
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IWATA Atsushi
the Faculty of Engineering, Hiroshima University
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Iwata Atsushi
Electronic Materials And Devices Division Mitsubishi Petrochemical Co. Ltd.
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Nagata M
Department Of Computer And Systems Engineering Kobe University
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Ando H
Graduate School Of Engineering Hiroshima University
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