A 1V Low-Noise CMOS Amplifier Using Autozeroing and Chopper Stabilization Technique(<Special Section>Analog Circuit and Device Technologies)
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概要
- 論文の詳細を見る
A low-noise CMOS amplifier operating at a low supply voltage is developed using the two noise reduction techniques of autozeroing and chopper stabilization. The proposed amplifier utilizes a feedback with virtual grounded input-switches and a multiple-output switched op-amp. The low-noise amplifier fabricated in a 0.18-μm CMOS technology achieved 50-nV/√Hz input noise at 1-MHz chopping and 0.5-mW power consumption at 1-V supply voltage.
- 社団法人電子情報通信学会の論文
- 2006-06-01
著者
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Iwata Atsushi
Graduate School Of Advanced Sciences Of Matter Hiroshima University
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Iwata A
Hiroshima Univ. Higashi-hiroshima‐shi Jpn
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Sasaki Mamoru
Graduate School Of Advanced Sciences Of Matter Hiroshima University
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Sasaki Mamoru
Hiroshima Univ. Higashihiroshima‐shi Jpn
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YOSHIDA Takeshi
Graduate School of Human and Environmental Studies, Kyoto University
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IWATA Atsushi
A-R-Tec Corporation
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Yoshida M
Graduate School Of Advanced Sciences Of Matter Hiroshima University
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Yoshida Masayuki
Graduate School Of Advanced Sciences Of Matter Hiroshima University
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Yoshida Takeshi
Graduate School Of Advanced Sciences Of Matter Hiroshima University
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Iwata Atsushi
Electronic Materials And Devices Division Mitsubishi Petrochemical Co. Ltd.
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Yoshida T
Graduate School Of Advanced Sciences Of Matter Hiroshima University
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Yoshiike Miki
St. Marianna University
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MASUI Yoshihiro
Graduate School of Advanced Sciences of Matter, Hiroshima University
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MASHIMO Takayuki
Graduate School of Advanced Sciences of Matter, Hiroshima University
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Masui Yoshihiro
Graduate School Of Advanced Sciences Of Matter Hiroshima University
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SHIOZAKI Mitsuru
Graduate School of Advanced Sciences of Matter, Hiroshima University
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Mashimo Takayuki
Graduate School Of Advanced Sciences Of Matter Hiroshima University
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