An Analog-Digital Merged Neural Circuit Using Pulse Width Modulation Technique (Special Section on Analog Circuit Techniques and Related Topics)

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概要

• 論文の詳細を見る

• This paper presents a neural circuit using PWM technique based on an analog-digital merged circuit architecture. Some new PWM circuit techniques are proposed. A bipolar-weighted summation circuit is described which attains 8-bit precision in SPICE simulation at 5 V supply voltage by compensating parasitic capacitance effects. A high performance differential-type latch comparator which can discriminate 1 mV difference at 100 MHz in SPICE simulation is also described. Next, we present a prototype chip fabricated using a 0.6μm CMOS process. The measurement results demonstrate that the overall precision in the weighted summation and the sigmoidal transformation is 5 bits. A neural network has been constructed using the prototype chips, and the experimental results for realizing the XOR function have successfully verified the basic neural operation.

• 社団法人電子情報通信学会の論文
• 1999-02-25

著者

• NAGATA Makoto

  Department of Computer and Systems Engineering, Kobe University

• Iwata A

  Hiroshima Univ. Higashi-hiroshima‐shi Jpn

• Morie T

  Graduate School Of Life Science And Systems Engineering Kyushu Institute Of Technology

• Morie Takashi

  Faculty Of Engineering Kyoto University

• NAGATA Makoto

  Faculty of Engineering, Hiroshima University

• IWATA Atsushi

  Faculty of Engineering, Hiroshima University

• IWATA Atsushi

  A-R-Tec Corporation

• FUNAKOSHI Jun

  Fujitsu Limited

• Iwata Atsushi

  Faculty Of Engineering Hiroshima University

• Nagata M

  Department Of Computer And Systems Engineering Kobe University

• Nagata Makoto

  Faculty Of Engineering Hiroshima University

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