A High-Linearity Low-Noise Amplifier with Variable Bandwidth for Neural Recoding Systems
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概要
- 論文の詳細を見る
This paper describes a low-noise amplifier with multiple adjustable parameters for neural recording applications. An adjustable pseudo-resistor implemented by cascade metal--oxide--silicon field-effect transistors (MOSFETs) is proposed to achieve low-signal distortion and wide variable bandwidth range. The amplifier has been implemented in 0.18 μm standard complementary metal--oxide--semiconductor (CMOS) process and occupies 0.09 mm2 on chip. The amplifier achieved a selectable voltage gain of 28 and 40 dB, variable bandwidth from 0.04 to 2.6 Hz, total harmonic distortion (THD) of 0.2% with 200 mV output swing, input referred noise of 2.5 μVrms over 0.1--100 Hz and 18.7 μW power consumption at a supply voltage of 1.8 V.
- 2011-04-25
著者
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Yoshida Takeshi
Graduate School Of Advanced Sciences Of Matter Hiroshima University
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Iwata Atsushi
A-r-tec Corp.
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Suzuki Takafumi
Graduate School Of Information Science And Technology The University Of Tokyo
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Matsushita Kojiro
Department Of Neurosurgery Osaka University
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Hirata Masayuki
Department Of Neurosurgery Osaka University
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Iwata Atsushi
A-R-Tech Corporation, Higashihiroshima, Hiroshima 739-0046, Japan
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Suzuki Takafumi
Graduate School of Information Science and Technology, University of Tokyo, Bunkyo, Tokyo 113-8656, Japan
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Sueishi Katsuya
Graduate School of Advanced Sciences of Matter, Hiroshima University, Higashihiroshima, Hiroshima 739-8530, Japan
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