Iwata Atsushi | Graduate School Of Advanced Sciences Of Matter Hiroshima University

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概要

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著作論文

Image Segmentation/Extraction Using Nonlinear Cellular Networks and Their VLSI Implementation Using Pulse-Modulation Techniques(Special Section on Analog Circuit Techniques and Relate)
A 1-D CMOS PWM Cellular Neural Network Circuit and Resistive-Fuse Network Operation
A VLSI Spiking Feedback Neural Network with Negative Thresholding and Its Application to Associative Memory(Novel Device Architectures and System Integration Technologies)
Pulse Modulation Techniques for Nonlinear Dynamical Systems and a CMOS Chaos Circuit with Arbitrary 1-D Maps(New System Paradigms for Integrated Electronics)
An Hadamard Transform Chip Using the PWM Circuit Technique and Its Application to Image Processing(Special Issue on High-Performance Analog Integrated Circuits)
Bio-Inspired VLSIs Based on Analog/Digital Merged Technologies
New Non-Volatile Analog Memory Circuits Using PWM Methods (Special Issue on Integrated Electronics and New System Paradigms)
Low-Voltage, Low-Phase-Noise Ring-VCO using 1/f-Noise Reduction Techniques
A 0.6V Supply CMOS Amplifier Using Noise Reduction Technique of Autozeroing and Chopper Stabilization
A 1V Low-Noise CMOS Amplifier Using Autozeroing and Chopper Stabilization Technique(Analog Circuit and Device Technologies)
A Design of Neural Signal Sensing LSI with Multi-Input-Channels(Analog Circuit Techniques and Related Topics)
A Neural Recording Amplifier with Low-Frequency Noise Suppression
A 2.0Vpp Input, 0.5V Supply Delta Amplifier with A-to-D Conversion
A Low Noise Amplifier Using Chopper Stabilization for a Neural Sensor LSI
A stochastic computing chip for measurement of Manhattan distance
Chip-Level Substrate Coupling Analysis with Reference Structures for Verification(Physical Design,VLSI Design and CAD Algorithms)
Evaluation of Isolation Structures against High-Frequency Substrate Coupling in Analog/Mixed-Signal Integrated Circuits(Analog Circuit Techniques and Related Topics)
A 2.7 Gcps and 7-Multiplexing CDMA Serial Communication Chip Using Two-Step Synchronization Technique(Optical, PLL, Analog Circuit and Device Technologies)
A Pulse-Coupled Neural Network Simulator Using a Programmable Gate Array Technique
Low-Voltage and Low-Noise CMOS Analog Circuits Using Scaled Devices(Analog Circuits and Related SoC Integration Technologies)
A High-Resolution CMOS Image Sensor with Hadamard Transform Function
A Pulse-Coupled Neural Network Simulator Using a Programmable Gate Array Technique
PCA-based Object Detection/Recognition Chip for Wireless Interconnected 3-D Integration
Low-Voltage, Low-Phase-Noise Ring Voltage-Controlled Oscillator Using $1/ f$-Noise Reduction Techniques
Stochastic Computing Chip for Measurement of Manhattan Distance
0.6 V Supply Complementary Metal Oxide Semiconductor Amplifier Using Noise Reduction Technique of Autozeroing and Chopper Stabilization
Evaluation of Digital Crosstalk Noise on Differential Input Voltage Controlled Oscillator

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