Reference Complementary Metal–Oxide–Semiconductor Circuits and Test Structures for Evaluation of Dynamic Noise in Power Delivery Networks
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概要
- 論文の詳細を見る
A loop shift register (SR) circuit represents power noise generation of sequential logic operation in a given complementary metal–oxide–semiconductor (CMOS) technology. Reference experiments on noises over power delivery networks have been conducted in 0.18 μm 1.8 V, 90 nm 1.2 V, and 90 nm 1.0 V technologies. It is consistently shown that power and ground noises exhibit universal dependency on circuit activity and follow to equivalent circuit simulation based on capacitance charging modeling of active devices, along with static impedances derived from power delivery networks of a test structure.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2010-04-25
著者
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Kosaka Daisuke
Department Of Computer And Systems Engineering Kobe University
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Nagata Makoto
Department Of Computer And Systems Engineering Kobe University
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Tetsuro Matsuno
Department of Computer Science and Systems Engineering, Kobe University, Kobe 657-8501, Japan
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Daisuke Kosaka
Department of Computer Science and Systems Engineering, Kobe University, Kobe 657-8501, Japan
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Matsuno Teturo
Department of Computer Science and Systems Engineering, Kobe University, Kobe 657-8501, Japan
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