Design of Effective Supply Voltage Monitor for Measuring Power Rails of Integrated Circuits
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概要
- 論文の詳細を見る
An effective supply voltage monitor evaluates dynamic variation of (Vdd-Vss) within power rails of integrated circuits on a die. The monitor occupies an area of as small as 10.8×14.5µm2 and is followed by backend digitizing circuits, both using 3.3V thick oxide transistors in a 65nm CMOS technology for covering all power domains from core circuits to peripheral I/O rings. A prototype demonstrates capturing of effective supply voltage waveforms in digital (shift registers) as well as in analog (4bit Flash ADC) circuits.
著者
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Nagata Makoto
Graduate School Of System Informatics Kobe University
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OKUMOTO Takeshi
Graduate School of System Informatics, Kobe University
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YOSHIKAWA Kumpei
Graduate School of System Informatics, Kobe University
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- FOREWORD
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- Design of Effective Supply Voltage Monitor for Measuring Power Rails of Integrated Circuits
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