OZAKI Hideyuki | Renesas Technology Corp.

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概要

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著作論文

A Study of Sense-Voltage Margins in Low-Voltage-Operating Embedded DRAM Macros(Integrated Electronics)
A Low Power Embedded DRAM Macro for Battery-Operated LSIs(Power Optimization)(VLSI Design and CAD Algorithms)
An Embedded DRAM Hybrid Macro with Auto Signa Management and Enhanced-on-Chip Tester
A 0.18 ★m 32 Mb Embedded DRAM Macro for 3-D Graphics Controller
A Board Level Parallel Test Circuit and a Short Circuit Failure Repair Circuit for High-Density, Low-Power DRAMs (Special Issue on Circuit Technologies for Memory and Analog LSIs)
A Mixed-Mode Voltage Down Converter with Impedance Adjustment Circuitry for Low-Voltage High-Frequency Memories
A Flexible Search Managing Circuitry for High-Density Dynamic CAMs (Speial Section on High Speed and High Density Multi Functional LSI Memories)
A Bitline Control Circuit Scheme and Redundancy Technique for High-Density Dynamic Content Addressable Memories (Special Issue on LSI Memories)
Fully Self-Timing Data-Bus Architecture for 64-Mb DRAMs
An Automatic Temperature Compensation of Internal Sense Ground for Subquarter Micron DRAM's(Special Issue on the 1994 VLSI Circuits Symposium)
An Efficient Back-Bias Generator with Hybrid Pumping Circuit for 1.5-V DRAM's (Special Section on the 1993 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.29, No.4 April 1994))
Dynamic Floating Body Control SOI CMOS for Power Managed Multimedia ULSIs
A Low Power and High Speed Data Transfer Scheme with Asynchronous Compressed Pluse Width Modulation for AS-Memory

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