OZAKI Hideyuki | ULSI Development Center, Mitsubishi Electric Corp.

スポンサーリンク

概要

関連著者

もっと見る

著作論文

A 0.18 ★m 32 Mb Embedded DRAM Macro for 3-D Graphics Controller
A Board Level Parallel Test Circuit and a Short Circuit Failure Repair Circuit for High-Density, Low-Power DRAMs (Special Issue on Circuit Technologies for Memory and Analog LSIs)
A Bitline Control Circuit Scheme and Redundancy Technique for High-Density Dynamic Content Addressable Memories (Special Issue on LSI Memories)
Fully Self-Timing Data-Bus Architecture for 64-Mb DRAMs
An Automatic Temperature Compensation of Internal Sense Ground for Subquarter Micron DRAM's(Special Issue on the 1994 VLSI Circuits Symposium)
An Efficient Back-Bias Generator with Hybrid Pumping Circuit for 1.5-V DRAM's (Special Section on the 1993 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.29, No.4 April 1994))

スポンサーリンク