Asakura Mikio | Ulsi Laboratory Mitsubishi Electric Corporation

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著作論文

A Board Level Parallel Test Circuit and a Short Circuit Failure Repair Circuit for High-Density, Low-Power DRAMs (Special Issue on Circuit Technologies for Memory and Analog LSIs)
A Mixed-Mode Voltage Down Converter with Impedance Adjustment Circuitry for Low-Voltage High-Frequency Memories
An Automatic Temperature Compensation of Internal Sense Ground for Subquarter Micron DRAM's(Special Issue on the 1994 VLSI Circuits Symposium)
A Well-Synchronized Sensing/Equalizing Method for Sub-1.0-V Operating Advanced DRAM's (Special Section on the 1993 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.29, No.4 April 1994))
A Smart Design Methodology with Distributed Extra Gate-Arrays for Advanced ULSI Memories (Special Issue on LSI Memories)

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