Yamada Michihiro | Ulsi Laboratory Mitsubishi Electric Corporation

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著作論文

A Board Level Parallel Test Circuit and a Short Circuit Failure Repair Circuit for High-Density, Low-Power DRAMs (Special Issue on Circuit Technologies for Memory and Analog LSIs)
A 5.8 ns 256 kb SRAM with 0.4μm Super-CMOS Process Technology (Special Issue on Circuit Technologies for Memory and Analog LSIs)
Large Scale Embedded DRAM Technology(Special Issue on Multimedia, Network, and DRAM LSIs)

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