An Automatic Temperature Compensation of Internal Sense Ground for Subquarter Micron DRAM's(Special Issue on the 1994 VLSI Circuits Symposium)

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概要

• 論文の詳細を見る

• This paper describes DRAM array driving techniques and the parameter scaling techniques for a low voltage operation using the boosted sense ground (BSG) scheme and further improved methods. A temperature compensation and adjustable internal voltage levels maintain a small subthreshold leakage current of a memory cell transistor (MC-Tr), and a distributed BSG (DBSG) scheme and a column decoded sensing (CDS) scheme achieve the effective scaling. These schemes can set the DRAM array free from a leakage current problem and free them from an influence of temperature variations. Therefore, parameters for the MC-Tr, threshold voltage (V_<th>), and the boosted voltage for the gate bias can be scaled down, and it is possible to determine the V_<th> of the MC-Tr easy (0.45V at K=0.4) for the satisfaction of the small leakage current, for the high speed and stable operation, and for the high reliability (V_<PP> is below 2V_<CC>). They are applicable to the subquarter micron DRAM's of 256Mb and more.

• 社団法人電子情報通信学会の論文
• 1995-06-25

著者

• OZAKI Hideyuki

  Renesas Technology Corp.

• HIDAKA Hideto

  ULSI Laboratory, Mitsubishi Electric Corporation

• Ozaki H

  Renesas Technology Corp.

• OZAKI Hideyuki

  ULSI Development Center, Mitsubishi Electric Corp.

• Ozaki Hideyuki

  Ulsi Laboratory Mitsubishi Electric Corporation

• FURUTANI Kiyohiro

  ULSI Laboratory, Mitsubishi Electric Corporation

• OOISHI Tsukasa

  ULSI Laboratory, Mitsubishi Electric Corporation

• ASAKURA Mikio

  ULSI Laboratory, Mitsubishi Electric Corporation

• HAMADE Kei

  the ULSI Laboratory, Mitsubishi Electric Corporation

• YASUDA Kenichi

  the ULSI Laboratory, Mitsubishi Electric Corporation

• Hamade Kei

  The Ulsi Laboratory Mitsubishi Electric Corporation

• Hidaka H

  Yrp Mobil Telecommunications Key Technol. Res. Lab. Co. Ltd. Yokosuka‐shi Jpn

• Hidaka Hideto

  Ulsi Laboratory Mitsubishi Electric Corporation

• Asakura Mikio

  Ulsi Laboratory Mitsubishi Electric Corporation

• Yasuda Kenichi

  The Ulsi Laboratory Mitsubishi Electric Corporation

• Ooishi T

  Ulsi Laboratory Mitsubishi Electric Corporation

• Oashi Toshiyuki

  Ulsi Development Center Mitsubishi Electric Corporation

• Ooishi Tsukasa

  Ulsi Laboratory Mitsubishi Electric Corporation

• Miyamoto H

  Nagoya Inst. Technol. Nagoya‐shi Jpn

• Komiya Yuichiro

  ULSI Laboratory, Mitsubishi Electric Corporation

• Hamade Kei

  ULSI Laboratory, Mitsubishi Electric Corporation

• Asakura Mikio

  LSI Research and Development Laboratory, Mitsubishi Electric Corporation

• Yasuda Kenichi

  LSI Research and Development Laboratory, Mitsubishi Electric Corporation

• Furutani Kiyohiro

  LSI Research and Development Laboratory, Mitsubishi Electric Corporation

• Hidaka Hideto

  LSI Research and Development Laboratory, Mitsubishi Electric Corporation

• Miyamoto Hiroshi

  ULSI Laboratory, Mitsubishi Electric Corporation

• Furutani K

  Renesas Technol. Corp. Itami‐shi Jpn

• Komiya Yuichiro

  The Ulsi Laboratory Mitsubishi Electric Corporation

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