MIHARA Masakatsu | Research and Development Center, Toshiba Corp.

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著作論文

Refractory WN_x/W Self-Aligned Gate GaAs Power Metal-Semiconductor Field-Effect Transistor for 1.9-GHz Digital Mobile Communication System Operating with a Single Low-Voltage Supply
Single 3-V Supply Operation GaAs Linear Power MESFET Amplifier for 5.8-GHz ISM Band Applications (Special Issue on Microwave and Millimeter Wave Technology)
A Self-Aligned Gate AlGaAs/GaAs Heterostructure Field-Effect Transistor with an Ion-Implanted Buried-Channel for use in High Efficiency Power Amplifiers
A Buried-Channel Self-Aligned GaAs MESFET with High Power-Efficiency and Low Noise-Figure for 1.9-GHz Single-Chip Front-End MMICs (Special Issue on Low-Power and High-Speed LSI Technologies)
A Buried-Channel WN_x/W Self-Aligned GaAs MESFET with High Power-Efficiency and Low Noise-Figure for Single-Chip Front-End MMIC in Personal Handy Phone System
Buried-Channel WN_x/W Self-Aligned GaAs MESFET Process with Selectively Implanted Channel and Undoped Epitaxial Surface Layers for MMIC Applications
A Flexible Search Managing Circuitry for High-Density Dynamic CAMs (Speial Section on High Speed and High Density Multi Functional LSI Memories)
A Bitline Control Circuit Scheme and Redundancy Technique for High-Density Dynamic Content Addressable Memories (Special Issue on LSI Memories)

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