Hirose M | Ntt Electronics Ebina‐shi Jpn

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著作論文

A Buried-Channel Self-Aligned GaAs MESFET with High Power-Efficiency and Low Noise-Figure for 1.9-GHz Single-Chip Front-End MMICs (Special Issue on Low-Power and High-Speed LSI Technologies)
Gate Current Control Method by Pull-Down FET's for 0-28dB GaAs Variable Attenuator in Direct-Conversion Modulator IC for 1.9GHz PHS (Special Issue on Microwave and Millimeterwave High-power Devices)
A Buried-Channel WN_x/W Self-Aligned GaAs MESFET with High Power-Efficiency and Low Noise-Figure for Single-Chip Front-End MMIC in Personal Handy Phone System
Buried-Channel WN_x/W Self-Aligned GaAs MESFET Process with Selectively Implanted Channel and Undoped Epitaxial Surface Layers for MMIC Applications
Scatterings of Shallow Threshold Voltage on Si-Implanted WN Self-Alignment Gate GaAs Metal-Semiconductor Field-Effect Transistors on Different Composition 2-Inch Substrates by Growing in Three Kinds of Furnaces

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