A Single-Chip 2.4-GHz RF Transceiver LSI with a Wide-Input-Range Frequency Discriminator(Special Issue on Silicon RF Device & Integrated Circuit Technologies)
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概要
- 論文の詳細を見る
This paper describes a single-chip RF transceiver LSI for 2.4-GHz-band Bluetooth applications. This chip uses a 0.5 μm BiCMOS process, which provides 23 GHz fT. The LSI consists of almost all the required RF and IF building blocks- a power amplifier (PA), a low noise amplifier (LNA), an image rejection mixer (IRM), channel-selection filters, a limiter, a received signal strength indicator (RSSI), a frequency discriminator, a voltage controlled oscillator (VCO), and a phase-locked loop (PLL) synthesizer. The transceiver consumes 34.4 mA in TX mode (PA, VCO, PLL) and 44.0 mA in RX mode (LNA, IRM, channel-selection filters, limiter, RSSI, frequency discriminator, VCO, PLL). Direct-up conversion with a frequency doubler is used for the TX architecture. In order to avoid the VCO pulling, we used a 1.2 GHz VCO with the frequency doubler. In the receiver section, a low-IF single conversion RX architecture is employed for the integration of the channel-selection filters. The transceiver has a proposed linear frequency discriminator with a wide input range. The wide input-frequency range discriminator is required to realize the lower IF RX architecture because of the higher ratio of frequency deviation to the center IF frequency. The discriminator is the delay line type, and consists of a mixer and a delay line circuit with a locked loop. The delay line connects to one input terminal of the mixer. By using the delay locked at one fourth of the period of the IF frequency, a quadrature phase shift IF signal is applied to the mixer input terminal. For the frequency discriminator, the DC output voltage changes in proportion to the input frequency and a wide input range is achieved. This RF transceiver sufficiently satisfies all the target specifications for short-range Bluetooth applications. By using this chip, a -80 dBm sensitivity is obtained for the 10^<-3> BER, and the transceiver can deliver an output power of over 0.0 dBm.
- 2002-07-01
著者
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HAYASHI Ryoji
Information Technology R&D Center, Mitsubishi Electric Corporation
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Sato Hiromi
Riken
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KOMURASAKI Hiroshi
System LSI Division, Mitsubishi Electric Corporation
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SATO Hisayasu
System LSI Development Center, Mitsubishi Electric Corporation
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MIKI Takahiro
System LSI Division, Mitsubishi Electric Corporation
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Sato H
Riken
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Saito H
Information Technology R Amp D Center Mitsubishi Electric Corporation
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Horiba Yasutaka
System Lsi Laboratory Mitsubishi Electric Corporation
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ONO Masayoshi
Information Technology R&D Center, Mitsubishi Electric Corporation
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Ono Masayoshi
Information Technology R&d Center Mitsubishi Electric Corporation
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Komurasaki Hiroshi
System Lsi Division Mitsubishi Electric Corporation
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Miki Takahiro
System Lsi Division Mitsubishi Electric Corporation
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Miki T
Faculty Of Education Gunma University
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Hayashi R
Univ. Tokyo Tokyo Jpn
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Hayashi Ryoji
Information Technology R&d Center Mitsubishi Electric Corporation
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EBANA Takeo
Mitsubishi Electric Engineering Company Limited
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TAKEDA Harunobu
Mitsubishi Electric Engineering Company Limited
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TAKAHASHI Kohji
System LSI Division, Mitsubishi Electric Corporation
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HAYASHI Yutaka
System LSI Division, Mitsubishi Electric Corporation
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IGA Tetsuya
System LSI Division, Mitsubishi Electric Corporation
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HASEGAWA Kohichi
System LSI Division, Mitsubishi Electric Corporation
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Hasegawa Kohichi
System Lsi Division Mitsubishi Electric Corporation
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Shibata H
System Lsi Development Center Mitsubishi Electric Corporation
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Iga Tetsuya
System Lsi Division Mitsubishi Electric Corporation
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Hayashi Ryoji
Information Technology R & D Center Mitsubishi Electric Corporation
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Takahashi Kohji
System Lsi Division Mitsubishi Electric Corporation
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Hayashi Yutaka
System Lsi Division Mitsubishi Electric Corporation
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