A 10 bit 50 MS/s CMOS D/A Converter with 2.7 V Power Supply (Special Section on Low-Power and Low-Voltage Integrated Circuits)
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概要
- 論文の詳細を見る
It has become an important subject to realize a high-speed D / A converter with low supply voltage. This paper discusses a 10 bit 50 MS / s CMOS D / A converter with 2.7 V power supply. Reduction of the supply voltage is achieved by developing "saturation-linear" biasing technique in current sources. In this scheme, a grounded transistor in cascode configuration is biased in linear region. High conversion rate is obtained by driving this grounded transistor directly. A charging transistor is also introduced into the current source for accelerating the settling time. The D / A converter is fabricated in a 1 μm CMOS process without using optional process steps. It successfully operates at 50 MS / s with 2.7 V power supply. The circuit techniques discussed here can be easily introduced into half-micron D / A converters.
- 社団法人電子情報通信学会の論文
- 1993-05-25
著者
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Horino Y
Advanced Device Development Dept. Renesas Technology Corp.
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HORIBA Yasutaka
The authors are with Kita-Itami Works, Mitsubishi Electric Corporation
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Horiba Yasutaka
Lsi Laboratory Mitsubishi Electric Corporation
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Horiba Yasutaka
The Authors Are With Kita-itami Works Mitsubishi Electric Corporation
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Horiba Yasutaka
System Lsi Laboratory Mitsubishi Electric Corporation
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Okada Keisuke
Information And Technology R&d Center Mitsubishi Electric Corporation:(present Address)renesas T
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Miki Takahiro
System Lsi Division Mitsubishi Electric Corporation
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Miki T
Faculty Of Education Gunma University
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NISHIKAWA Yoshikazu
Osaka Institute of Technology
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NAKAMURA Yasuyuki
Mitsubishi Electric Corporation
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Miki Takahiro
LSI Laboratory, Mitsubishi Electric Corporation
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Nakamura Yasuyuki
LSI Laboratory, Mitsubishi Electric Corporation
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Nishikawa Yoshikazu
LSI Laboratory, Mitsubishi Electric Corporation
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Okada Keisuke
LSI Laboratory, Mitsubishi Electric Corporation
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Nishikawa Y
Osaka Institute Of Technology
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