2.4-GHz-Band CMOS RF Front-End Building Blocks at a 1.8-V Supply(<特集>Special Section on Analog Circuit Techniques and Related Topics)
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概要
- 論文の詳細を見る
This paper describes 2.4-GHz-band front-end building circuits-a down conversion mixer (DCM), a dual-modulus divide-by-4/5 prescaler, a transmit/receive antenna switch (SW), a power amplifier (PA), and a low noise amplifier (LNA). They are fabricated using a standard bulk 0.18μm CMOS process with a lower current consumption than bipolar circuits, and can operate at the low supply voltage of 1.8V. Meshed-shielded pads are adopted for lower receiver circuit noise. Pads shielded by metals become cracked when they are bounded, therefore silicided active areas are used as shields instead of metals to avoid these cracks. The meshed shields achieve lower parasitic pad capacitors without parasitic resistors, and also act as dummy active areas. The proposed DCM has a high IP3 characteristic. The DCM has a cascode FET configuration and LO power is injected into the lower FET. By keeping the drain-source voltage of the upper transistor large, the nonlinearity of the drain-source transconductance is reduced and a low distortion DCM is realized. It achieves a higher input referred IP3 with a higher conversion gain for almost the same current consumption of a conventional single-balanced mixer. The output referred IP3 is higher 5.0dB than the single-balanced mixer. The proposed dual-modulus prescaler employs a fully-differential technique to achieve stable operation. In order to avoid errors, the fully-differential circuit gives the logic voltage swing margins. In addition, the differential technique also reduces the noise effect from the supply voltage line because of the common-mode signal rejection. The maximum operating frequency is 3.0 GHz, and the one flip-flop power consumption normalized by the maximum operating frequency is 180 μW/GHz.
- 社団法人電子情報通信学会の論文
- 2002-02-01
著者
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HYOGO Akira
Faculty of Science and Technology, Tokyo University of Science
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SEKINE Keitaro
Faculty of Science and Technology, Tokyo University of Science
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Sato Hiromi
Riken
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KOMURASAKI Hiroshi
System LSI Division, Mitsubishi Electric Corporation
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SATO Hisayasu
System LSI Development Center, Mitsubishi Electric Corporation
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YAMAMOTO Kazuya
System LSI Development Center, Mitsubishi Electric Corporation
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MIKI Takahiro
System LSI Division, Mitsubishi Electric Corporation
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Sato H
Riken
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Hyogo Akira
Faculty Of Science And Technology Science University Of Tokyo
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Saito H
Information Technology R Amp D Center Mitsubishi Electric Corporation
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Sekine Keitaro
Faculty Of Science And Technology Okyo University Of Science
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Yamamoto Kazuya
System Lsi Development Center Mitsubishi Electric Corporation
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FURUKAWA Akihiko
Advanced Technology R&D Center, Mitsubishi Electric Corporation
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Yamamoto K
Renesas Technology Corp.
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Kato Naoyuki
System Lsi Development Center Mitsubishi Electric Corporation
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Komurasaki Hiroshi
System Lsi Division Mitsubishi Electric Corporation
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Miki Takahiro
System Lsi Division Mitsubishi Electric Corporation
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Miki T
Faculty Of Education Gunma University
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Wakada Hideyuki
System Lsi Development Center Mitsubishi Electric Corporation
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HEIMA Tetsuya
System LSI Development Center
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Heima Tetsuya
System Lsi Development Center Mitsubishi Electric Corporation
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Shibata H
System Lsi Development Center Mitsubishi Electric Corporation
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Furukawa Akihiko
Advanced Technology R & D Center Mitsubishi Electric Corporation
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