New Scheme of Electrostatic Discharge Circuit Simulations Using Protection Device Model with Generated-Hole-Dependent Base Resistance

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Suppressed short-channel effect of DG-MOSFET and its modeling
New Scheme of Electrostatic Discharge Circuit Simulations Using Protection Device Model with Generated-Hole-Dependent Base Resistance
Compact Double-Gate Metal-Oxide-Semiconductor Field Effect Transistor Model for Device/Circuit Optimization
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Neutron-Induced Soft-Error Simulation Technology for Logic Circuits
Technological Trends of Soft Error Estimation Based on Accurate Estimation Method
New Scheme of Electrostatic Discharge Circuit Simulations Using Protection Device Model with Generated-Hole-Dependent Base Resistance
Resistivity of Heavily Doped Polycrystalline Silicon Subjected to Furnace Annealing
Threshold Voltage Instability of 45-nm-node Poly-Si-or FUSI-Gated SRAM Transistors Caused by Dopant Lateral Diffusion in Poly-Si
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High Tilt Angle Ion Implantation into Polycrystalline Si Gates
Metal Oxide Semiconductor Field Effect Transistor (MOSFET) Model Based on a Physical High-Field Carrier-Velocity Model
Quasi Crystal Lindhard–Scharff–Schiott Theory and Database for Ion Implantation Profiles in Si1-xGex Substrate Based on the Theory
Thermal Budget for Fabricating a Dual Gate Deep-Submicron CMOS with Thin Pure Gate Oxide

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