High Activation of Ga at Low Temperatures

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Direct Observation of Atomic Ordering and Interface Structure in Co_2MnSi/MgO/Co_2MnSi Magnetic Tunnel Junctions by High-Angle Annular Dark-Field Scanning Transmission Electron Microscopy
High Performance Low Temperature Polycrystalline Silicon Thin Film Transistors on Non-alkaline Glass Produced Using Diode Pumped Solid State Continuous Wave Laser Lateral Crystallization
New Scheme of Electrostatic Discharge Circuit Simulations Using Protection Device Model with Generated-Hole-Dependent Base Resistance
High Tilt Angle Ion Implantation into Polycrystalline Si Gates
Analysis of Non-Uniform Boron Penetration of Nitrided Oxide in PMOSFETs Considering Two-Dimensional Nitrogen Distribution
Boron Penetration Enhanced by Gate Ion Implantation Damage in PMOSFETs
Hydrogen-Enhanced Boron Penetration in PMOS Devices during SiO_2 Chemical Vapor Deposition
Hydrogen-Enhancing Boron Penetration in P-MOS Devices during SiO_2 Chemical Vapor Deposition
Boron Diffusion in Nitrided-Oxide Gate Dielectrics Leading to High Suppression of Boron Penetration in P-MOSFETs
Boron Diffusion in Nitrided Oxide Gate Dielectrics Leading to High Suppression of Boron Penetration in P-MOSFETs
Sb Multiple Ion Implanted Channel for Low V_, Deep Submicron SOI-pMOSFETs
Thermal Budget for Fabricating a Dual Gate Deep-Submicron CMOS with Thin Pure Gate Oxide
Vth Rolloff Free Sub 0.1μm SOI MOSFETs Using Counter Doping into a Uniformly and Heavily Doped Channel Region
Thermal Budget for Fabricating A Dual Gate Deep-Submicron CMOS with Thin Pure Gate Oxide
Doping Characteristics of Gas-Source MBE-Grown n-Al_xGa_As (x=0-0.28) Doped Using Disilane
Metal Oxide semiconductor Field Effect Transistor (MOSFET) Model Based on a Physical High-Field Carrier-Velocity Model
Suppression of Beryllium Diffusion by Incorporating Indium in AlGaAs for HBT Applications using Molecular Beam Epitaxy
Electric Field Effect in LaTiO_3/SrTiO_3 Heterostructure
Advanced SOI Devices Using CMP and Wafer Bonding
Electric Field Effect in LaTiO_3/SrTiO_3 Heterostructure
High Activation of Ga at Low Temperatures
High-Speed and Low-Power n^+-p^+ Double-Gate SOI CMOS
Effects of N_2O Plasma Treatment for Low Temperature Polycrystalline Silicon TFTs(Special Issue on Electronic Displays)
Impact of Current Gain Increment Effect on Alpha Particle Induced Soft Errors in SOI DRAMs
Theoretical Study of Alpha-Particle-Induced Soft Errors in Submicron SOI SRAM (Special Issue on ULSI Memory Technology)
Extraction of Depth-Dependent Lateral Standard Deviation from One-Dimensional Tilted Implantation Profiles
Analytical Models for Symmetric Thin-Film Double-Gate Silicon-on-Insulator Metal-Oxide-Semiconductor-Field-Effect-Transistors
New Scheme of Electrostatic Discharge Circuit Simulations Using Protection Device Model with Generated-Hole-Dependent Base Resistance
Resistivity of Heavily Doped Polycrystalline Silicon Subjected to Furnace Annealing
Threshold Voltage Instability of 45-nm-node Poly-Si-or FUSI-Gated SRAM Transistors Caused by Dopant Lateral Diffusion in Poly-Si
High Performance Low Temperature Polycrystalline Silicon Thin Film Transistors on Non-alkaline Glass Produced Using Diode Pumped Solid State Continuous Wave Laser Lateral Crystallization
Analytical Threshold Voltage Model for Double-Gate Schottky Source/Drain Silicon-on-Insulator Metal Oxide Semiconductor Field Effect Transistor
High Tilt Angle Ion Implantation into Polycrystalline Si Gates
Metal Oxide Semiconductor Field Effect Transistor (MOSFET) Model Based on a Physical High-Field Carrier-Velocity Model
Dependence of Sheet Resistance of CoSi2 with Gate Length of 30 nm on Thickness of Titanium Nitride Capping Layer in Co-Salicide Process
Quasi Crystal Lindhard–Scharff–Schiott Theory and Database for Ion Implantation Profiles in Si1-xGex Substrate Based on the Theory
Thermal Budget for Fabricating a Dual Gate Deep-Submicron CMOS with Thin Pure Gate Oxide

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