Evaluation of Chemical Bonding Features and Resistance Switching Behaviors of Ultrathin Si Oxide Dielectric Sandwiched Between Pt Electrodes
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概要
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We investigated the chemical bonding features and resistance switching properties of ultrathin Si-rich oxides sandwiched between Pt electrodes to evaluate the feasibility of SiOx-based resistance random access memories (ReRAMs). In the early stages of SiOx deposition on Pt by radio-frequency (RF) sputtering in Ar + O2 gas mixture at 300 °C, the formation of a PtOx layer at the interface between SiOx and the Pt bottom electrode was observed. This interfacial PtOx layer decreased in thickness with increasing SiOx thickness. With decreasing as-deposited SiOx thickness down to 3.3 nm, the initial electrical state changed from the high resistance state (HRS) to the low resistance state (LRS), and resistance switching behavior was observed without the forming process. To gain a better understanding of the resistance switching mechanism, especially the role of oxygen deficiency in the SiOx network, we investigated the impact of O2 annealing after SiOx deposition on the switching behavior. The resistance switching behaviors were barely detectable for the samples at O2 annealing temperatures of over 500 °C. The results imply that the oxygen vacancies in the SiOx play an important role in resistance switching.
- 2012-06-25
著者
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OHTA Akio
Department of Chemistry and Chemical Engineering, Faculty of Engineering, Kanazawa University
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Goto Yuta
Department Of Chemistry And Biochemistry Graduate School Of Engineering Kyushu University
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Murakami Hideki
Department Of Electrical Engineering Graduate School Of Advanced Sciences Of Matter Hiroshima Univer
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Miyazaki Seiichi
Graduate School Of Advanced Sciences And Matters Hiroshima University
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Higashi Seiichiro
Department Of Semiconductor Electronics And Integration Science Graduate School Of Advanced Sciences
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Ohta Akio
Department of Semiconductor Electronics and Integration Science, Graduate School of Advanced Sciences of Matter, Hiroshima University, Higashihiroshima, Hiroshima 739-8530, Japan
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Nishigaki Shingo
Department of Semiconductor Electronics and Integration Science, Graduate School of Advanced Sciences of Matter, Hiroshima University, Higashihiroshima, Hiroshima 739-8530, Japan
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Murakami Hideki
Department of Semiconductor Electronics and Integration Science, Graduate School of Advanced Sciences of Matter, Hiroshima University, Higashihiroshima, Hiroshima 739-8530, Japan
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Higashi Seiichiro
Department of Electrical Engineering, Graduate School of Advanced Sciences of Matter, Hiroshima University, 1-3-1 Kagamiyama, Higashi-Hiroshima 739-8530, Japan
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Goto Yuta
Department of Semiconductor Electronics and Integration Science, Graduate School of Advanced Sciences of Matter, Hiroshima University, Higashihiroshima, Hiroshima 739-8530, Japan
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Miyazaki Seiichi
Graduate School of Advanced Science and Matter, Hiroshima University, Higashihiroshima, Hiroshima 739-8530, Japan
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