Charging Damage of Silicon-on-Insulator (SOI) Wafer Determined by Scanning Maxwell-Stress Microscopy
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概要
- 論文の詳細を見る
Charging damage of silicon-on-insulator (SOI) wafer induced by electron-beam (EB) lithography and reactive ion etching (RIE) has been investigated in terms of the surface potential change through the processes. Scanning Maxwell-stress microscopy (SMM) was utilized for measuring the SOI surface potential under a floating condition. Surface contamination due to resist residues was clearly observed in the SMM potential image. Negative charging of the SOI islands induced by EB lithography was observed particularly under an excessive EB exposure condition and conserved for several days. The cause of the negative charging is considered to be the trapping of electrons in the buried oxide of the SOI wafer.
- Publication Office, Japanese Journal of Applied Physics, Faculty of Science, University of Tokyoの論文
- 2001-04-30
著者
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ITOH Junji
Electrotechnical Laboratory
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YOKOYAMA Hiroshi
Electrotechnical Laboratory
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KANEMARU Seigo
Electrotechnical Laboratory
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Fujii Hideo
Core Research For Evolutional Science And Technology Program (crest) Japan Science And Technology Co
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MATSUKAWA Takashi
Electrotechnical Laboratory
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NAGAO Masayoshi
Electrotechnical Laboratory
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Matsukawa Takashi
Electrotechnical Laboratory, 1-1-4 Umezono, Tsukuba-shi, Ibaraki 305-8568, Japan
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Itoh Junji
Electrotechnical Laboratory, 1-1-4 Umezono, Tsukuba-shi, Ibaraki 305-8568, Japan
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Fujii Hideo
Core Research for Evolutional Science and Technology Program (CREST), Japan Science and Technology Corporation (JST), 4-1-8 Honcho, Kawaguchi-shi, Saitama 332-0012, Japan
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Kanemaru Seigo
Electrotechnical Laboratory, 1-1-4 Umezono, Tsukuba-shi, Ibaraki 305-8568, Japan
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