Control of Si Solid Phase Nucleation by Surface Steps for High-Performance Thin-Film Transistors
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概要
- 論文の詳細を見る
The solid phase nucleation process of amorphous Si (a-Si) deposited by vacuum evaporation on thermally grown SiO_2 layers on Si substrates having steps has been investigated. Steps were formed by either isotropic wet chemical etching of the SiO_2 layer or anisotropic wet chemical etching of Si(100) followed by thermal oxidation. It has been found that solid phase nucleation is enhanced at the steps and that nucleation sites can be controlled by changing the step shape and a-Si thickness. Grain growth up to about 3 μm from the step edge has been observed. n-channel MOSFET's (metal-oxide-semiconductor field-effect-transistor's) which had steps at the source/drain edge were fabricated. They showed channel electron mobility of about 200 cm^2/V・s, which is approximately one order higher than that obtained from MOSFET's fabricated in Si films formed by solid phase crystallization on flat SiO_2/Si substrates.
- 社団法人応用物理学会の論文
- 1993-01-30
著者
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Asano Tanemasa
Center For Microelectronic Systems Kyushu Institute Of Technology
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MAKIHIRA Kenji
Center for Microelectronic Systems, Kyushu Institute of Technology
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Makihira K
Kyushu Inst. Technol. Fukuoka Jpn
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Makihira Kenji
Center For Microelectronic Systems Kyushu Institute Of Technology
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