Reduction of Charge Build-Up during Reactive Ion Etching by Using Silicon-On-Insulator Structures
スポンサーリンク
概要
- 論文の詳細を見る
The charge build-up of silicon-on-insulator (SOI) structures during reactive ton etching has been investigated. The charge build-up was evaluated by using metal/nitride/oxide/silicon (MNOS) capacitors fabricated on SOI. It has been found that the charge build-up can be drastically reduced by using SOI, while the reduction in etching rate is only 3% less than that attained using bulk Si wafers at a relatively high RF power condition. The amount of charge build-up has been found to decrease the thickness of the buried oxide layer increases. A model to explain these phenomena is discussed.
- 社団法人応用物理学会の論文
- 1997-03-30
著者
-
Asano Tanemasa
Center For Microelectronic Systems Kyushu Institute Of Technology
-
AKAMATSU Masashi
Center for Microelectronics Systems, Kyushu Institute of Technology
-
Arita Kiyoshi
Center For Microelectronic Systems Kyushu Institute Of Technology
-
AKIMATSU Masashi
Center for Microelectronic Systems, Kyushu Institute of Technology
-
Akimatsu Masashi
Center For Microelectronic Systems Kyushu Institute Of Technology
-
Akamatsu Masashi
Center for Microelectronic Systems, Kyushu Institute of Technology
関連論文
- Ion Beam Modification of a Photoresist and Its Application to Field Emitters
- Field Emission from an Jon Irradiated Photoresist
- D315 A NOVEL FLUIDIC MICROMOTOR DRIVEN BY THERMOCAPILLARY FORCE(Micro-scale phenomena)
- A Variable Channel-Size MOSFET with Lightly Doped Drain Structure
- SOI-MOSFET/Diode Composite Photodetection Device
- Electrostatic Inkjet Patterning Using Si Needle Prepared by Anodization
- Electrostatic Droplet Ejection Using Planar Needle Inkjet Head
- Fabrication of Micro Field Emitter Tip Using Ion-Beam Irradiation-Induced Self-Standing of Thin Films
- Field Electron Emission from Inkjet-Printed Carbon Black
- Increased Emission Efficiency of Gated Cold Cathode with Carbonic Nano-Pillars
- Micro Field Emitter with Nano-Pillarets Formed by Reactive Ion Etching of Photoresist
- Suppressing Plasma Induced Degradation of Gate Oxide Using Silicon-on-Insulator Structures
- Suppressing Plasma Induced Degradation of Gate Oxide by Using Silicon-On-Insulator Structures
- Reduction of Charge Build-up during Reactive Ion Etching by Using SOI Structures
- Variation of Photoluminescence Properties of Stain-Etched Si with Crystallinity of Starting Polycrystalline Si Films
- Ion Beam Modified Photoresist : A New Class of Field Emitter Material for Large Area Devices (Special Issue on Electronic Displays)
- Connection Test of Area Bump Using Active-Matrix Switches
- Connection Test of Area Bump Using Active-Matrix Switches
- Dynamic Strain and Chip Damage during Ultrasonic Flip Chip Bonding
- Dynamic Strain and Its Distribution during Ultrasonic Flip Chip Bonding
- CMOS Application of Single-Grain Thin Film Transistor Produced Using Metal Imprint Technology
- Low-Voltage-Signaling CMOS Receiver with Dynamic Threshold Control
- Low-Voltage-Signaling CMOS Receiver with Dynamic Threshold Control
- Joule Heating of Field Emitter Tip Fabricated on Glass Substrate
- Influence of Direct Au-Bump Formation on Metal Oxide Semiconductor Field Effect Transistor
- Behavior of Plated Microbumps during Ultrasonic Flip-Chip Bounding Determined from Dynamic Strain Measurement
- Effects of Electric Field on Metal-Induced Lateral Crystallization under Limited Ni-Supply Condition(Thin Film Transistors, Fundamental and Application of Advanced Semiconductor Devices)
- Physical Random-Number Generator Using Schottky MOSFET
- Physical Random-Number Generator Using Schottky MOSFET
- Breakdown Voltage in Uniaxially Strained n-Channel SOI MOSFET
- Schottky Source/Drain SOI MOSFET with Shallow Doped Extension
- Monitoring of Two-Dimensional Plasma Uniformity with Electrostatic Probing of Oxidized Wafer Surface : Semiconductors
- Imprint Lithography Using Triple-Layer-Resist and Its Application to Metal-Oxide-Silicon Field-Effect-Transisor Fabrication
- Fabrication of Single-Crystal Silicon Field Emitter Array on Glass Substrate
- Measurement of Dynamic Strain during Ultrasonic Au Bump Formation on Si Chip
- New SOI Complementary-Bipolar Complementary-MOS(CBiCMOS)with Merged Device Structure
- A New Merged Bipolar-MOS Transistor in a Silicon on Insulator Structure
- Pyramid Bumps for Fine-Pitch Chip-Stack Interconnection
- Microheater-Driven Dancing Microbubble
- Easy Release of Mold in Imprint Lithography Using Ion-Beam-Irradiated Photoresist Surface
- Fabrication of Carbon-Based Field Emitters Using Stamp Technology
- A New Merged BiMOS Transistor in an SOI Structure
- Pyramid Bumps for Fine-Pitch Chip-Stack Interconnection
- Enhanced Solid-Phase Crystallization of Amorphous Si by Plasma Treatment Using Reactive Ion Etching
- Selective Solid-Phase Crystallization of Amorphous Si by Oxygen Plasma Treatment
- Control of Si Solid Phase Nucleation by Surface Steps for High-Performance Thin-Film Transistors
- Si Field Emitter Arrays Fabricated by Anodization and Transfer Technique
- Gas Species Dependent Charge Build-Up in Reactive Ion Etching
- Synthesis and Electrical Properties of Phosphorus-Doped Homoepitaxial Diamond (111) by Microwave Plasma-Assisted Chemical Vapor Deposition Using Triethylphosphine as a Dopant Source
- Reduction of Charge Build-Up during Reactive Ion Etching by Using Silicon-On-Insulator Structures
- Reduction of the Floating Body Effect in SOI MOSFETs by Using Schottky Source/Drain Contacts
- Fabrication of Field Emitter Arrays Using Si Delamination by Hydrogen Ion Implantation
- Fabrication of Microcantilever with a Silicon Tip Prepared by Anodization
- Field Emission from an Ion-Beam-Modified Polyimide Film
- A New Self-Aligned Process for Fabrication of Microemiter Arrays Using Selective Etching of Silicon
- Fabrication of Single-Crystal Si Microstructures by Anodization
- CMOS Image Sensor Using SOI-MOS/Photodiode Composite Photodetector Device
- Influence on Electrical Characteristic of Direct Au-Bumping on MOSFET
- Wafer-level Fabrication of Compliant Bump
- Pyramid Bumps for Fine-Pitch Chip-Stack Interconnection
- Measurement of Dynamic Strain during Ultrasonic Au-Bumping on Si Chip
- Application of Microwave Plasma Gate Oxidation to Strained-Si on SiGe and SGOI
- SOI-MOS/Diode Composite Photodetector Device
- New SOI-CBiCMOS with Merged Device Structure
- Reduction of the Floating-Body Effect in SOI MOSFETs by Using Schottky Source/Drain Contacts
- Characteristics of Thin-Film Transistors Fabricated on Nucleation-Controlled Poly-Si Films by Surface Steps
- Dynamic Strain and Chip Damage during Ultrasonic Flip Chip Bonding
- Electrostatic Inkjet Patterning Using Si Needle Prepared by Anodization
- Electrostatic Droplet Ejection Using Planar Needle Inkjet Head
- Field Electron Emission from Inkjet-Printed Carbon Black
- Connection Test of Area Bump Using Active-Matrix Switches
- Low-Voltage-Signaling CMOS Receiver with Dynamic Threshold Control
- A Variable Channel-Size MOSFET with Lightly Doped Drain Structure
- CMOS Application of Single-Grain Thin Film Transistor Produced Using Metal Imprint Technology
- SOI-MOSFET/Diode Composite Photodetection Device
- Location and Orientation Control of Si Grain by Combining Metal-Induced Lateral Crystallization and Excimer Laser Annealing
- Breakdown Voltage in Uniaxially Strained n-Channel SOI MOSFET
- Cross-Hatch Related Oxidation and Its Impact on Performance of Strained-Si MOSFETs
- CMOS Application of Schottky Source/Drain SOI MOSFET with Shallow Doped Extension
- Fabrication of a Gated Cold Cathode Using the Inkjet Embedding Method
- Micro Field Emitter with Nano-Pillarets Formed by Reactive Ion Etching of Photoresist
- Behavior of Plated Microbumps during Ultrasonic Flip-Chip Bonding Determined from Dynamic Strain Measurement
- Increased Emission Efficiency of Gated Cold Cathode with Carbonic Nano-Pillars
- Schottky Source/Drain SOI MOSFET with Shallow Doped Extension
- Location Control of Si Thin-Film Grain Using Ni Imprint and Excimer Laser Annealing